JPS5442942A - Memory array card - Google Patents
Memory array cardInfo
- Publication number
- JPS5442942A JPS5442942A JP9121377A JP9121377A JPS5442942A JP S5442942 A JPS5442942 A JP S5442942A JP 9121377 A JP9121377 A JP 9121377A JP 9121377 A JP9121377 A JP 9121377A JP S5442942 A JPS5442942 A JP S5442942A
- Authority
- JP
- Japan
- Prior art keywords
- memory array
- array card
- request signal
- clock pulse
- refresh request
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
Abstract
PURPOSE:To ensure formation of the refresh request signal through an easy synchronization with other memory array card, by forming the clock pulse from the refresh request signal and then supplying the clock pulse to the refresh address formation means.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP52091213A JPS588075B2 (en) | 1977-07-29 | 1977-07-29 | memory array card |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP52091213A JPS588075B2 (en) | 1977-07-29 | 1977-07-29 | memory array card |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5442942A true JPS5442942A (en) | 1979-04-05 |
JPS588075B2 JPS588075B2 (en) | 1983-02-14 |
Family
ID=14020134
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP52091213A Expired JPS588075B2 (en) | 1977-07-29 | 1977-07-29 | memory array card |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS588075B2 (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4878836A (en) * | 1971-12-30 | 1973-10-23 |
-
1977
- 1977-07-29 JP JP52091213A patent/JPS588075B2/en not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4878836A (en) * | 1971-12-30 | 1973-10-23 |
Also Published As
Publication number | Publication date |
---|---|
JPS588075B2 (en) | 1983-02-14 |
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