JPS5670645A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5670645A JPS5670645A JP14732179A JP14732179A JPS5670645A JP S5670645 A JPS5670645 A JP S5670645A JP 14732179 A JP14732179 A JP 14732179A JP 14732179 A JP14732179 A JP 14732179A JP S5670645 A JPS5670645 A JP S5670645A
- Authority
- JP
- Japan
- Prior art keywords
- film
- substrate
- forming
- mask
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76243—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14732179A JPS5670645A (en) | 1979-11-14 | 1979-11-14 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14732179A JPS5670645A (en) | 1979-11-14 | 1979-11-14 | Manufacture of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5670645A true JPS5670645A (en) | 1981-06-12 |
JPS628023B2 JPS628023B2 (ja) | 1987-02-20 |
Family
ID=15427532
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14732179A Granted JPS5670645A (en) | 1979-11-14 | 1979-11-14 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5670645A (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2563377A1 (fr) * | 1984-04-19 | 1985-10-25 | Commissariat Energie Atomique | Procede de fabrication d'une couche isolante enterree dans un substrat semi-conducteur, par implantation ionique |
-
1979
- 1979-11-14 JP JP14732179A patent/JPS5670645A/ja active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2563377A1 (fr) * | 1984-04-19 | 1985-10-25 | Commissariat Energie Atomique | Procede de fabrication d'une couche isolante enterree dans un substrat semi-conducteur, par implantation ionique |
Also Published As
Publication number | Publication date |
---|---|
JPS628023B2 (ja) | 1987-02-20 |
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