JPS5660055A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5660055A
JPS5660055A JP13544379A JP13544379A JPS5660055A JP S5660055 A JPS5660055 A JP S5660055A JP 13544379 A JP13544379 A JP 13544379A JP 13544379 A JP13544379 A JP 13544379A JP S5660055 A JPS5660055 A JP S5660055A
Authority
JP
Japan
Prior art keywords
region
diffused
guard ring
window
impurity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13544379A
Other languages
English (en)
Inventor
Susumu Ichinose
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP13544379A priority Critical patent/JPS5660055A/ja
Publication of JPS5660055A publication Critical patent/JPS5660055A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
JP13544379A 1979-10-20 1979-10-20 Manufacture of semiconductor device Pending JPS5660055A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13544379A JPS5660055A (en) 1979-10-20 1979-10-20 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13544379A JPS5660055A (en) 1979-10-20 1979-10-20 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5660055A true JPS5660055A (en) 1981-05-23

Family

ID=15151832

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13544379A Pending JPS5660055A (en) 1979-10-20 1979-10-20 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5660055A (ja)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58114456A (ja) * 1981-12-26 1983-07-07 Fuji Electric Co Ltd 定電圧ダイオ−ド内蔵トランジスタ
JPS6113664A (ja) * 1984-06-22 1986-01-21 エヌ・ベー・フイリツプス・フルーイランペンフアブリケン 大きな降伏電圧を有する半導体装置
JPS61251083A (ja) * 1985-04-26 1986-11-08 Rohm Co Ltd 半導体装置
US4691224A (en) * 1982-10-25 1987-09-01 Mitsubishi Denki Kabushiki Kaisha Planar semiconductor device with dual conductivity insulating layers over guard rings
JP2006156936A (ja) * 2004-10-25 2006-06-15 Matsushita Electric Ind Co Ltd 定電圧ダイオードおよびその製造方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5271974A (en) * 1975-12-11 1977-06-15 Nec Corp Production of semiconductor device
JPS52129275A (en) * 1976-04-21 1977-10-29 Fujitsu Ltd Impurity diffusion method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5271974A (en) * 1975-12-11 1977-06-15 Nec Corp Production of semiconductor device
JPS52129275A (en) * 1976-04-21 1977-10-29 Fujitsu Ltd Impurity diffusion method

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58114456A (ja) * 1981-12-26 1983-07-07 Fuji Electric Co Ltd 定電圧ダイオ−ド内蔵トランジスタ
US4691224A (en) * 1982-10-25 1987-09-01 Mitsubishi Denki Kabushiki Kaisha Planar semiconductor device with dual conductivity insulating layers over guard rings
JPS6113664A (ja) * 1984-06-22 1986-01-21 エヌ・ベー・フイリツプス・フルーイランペンフアブリケン 大きな降伏電圧を有する半導体装置
JPS61251083A (ja) * 1985-04-26 1986-11-08 Rohm Co Ltd 半導体装置
JP2006156936A (ja) * 2004-10-25 2006-06-15 Matsushita Electric Ind Co Ltd 定電圧ダイオードおよびその製造方法

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