JPS5658236A - Resist patterning method and device - Google Patents

Resist patterning method and device

Info

Publication number
JPS5658236A
JPS5658236A JP13447979A JP13447979A JPS5658236A JP S5658236 A JPS5658236 A JP S5658236A JP 13447979 A JP13447979 A JP 13447979A JP 13447979 A JP13447979 A JP 13447979A JP S5658236 A JPS5658236 A JP S5658236A
Authority
JP
Japan
Prior art keywords
container
resist
pattern
accelerated
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13447979A
Other languages
Japanese (ja)
Inventor
Nobuo Sasaki
Haruhisa Mori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13447979A priority Critical patent/JPS5658236A/en
Publication of JPS5658236A publication Critical patent/JPS5658236A/en
Pending legal-status Critical Current

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
    • H01J37/317—Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. for ion implantation
    • H01J37/3174—Particle-beam lithography, e.g. electron beam lithography
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Analytical Chemistry (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To obtain an optional pattern on the object without using a mask by a method wherein charged particles in a photoresist solution is accelerated. CONSTITUTION:A resist solution 21 is supplied to a metal container 22 in such way that it is always filled up. An alternative current is applied between the container 22 and an electrode 25 of a pyro-electric crystal plate 24 from a power source 26 and the plate 24 is oscillated. A jet of the resist solution is spouted from a nozzle 26A. By having the negative container 22, a DC of 200V is applied to an electrode 28 and resist particles 30, which are electrified to negative, are accelerated. A prescribed pattern is pictured on an element 33 by applying a current which has been programmed in advance to deflecting plates 31-31' and 32-32'. With this constitution, a relatively large pattern can be formed directly on the element without using a mask and also the process of manufacture can be reduced.
JP13447979A 1979-10-17 1979-10-17 Resist patterning method and device Pending JPS5658236A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13447979A JPS5658236A (en) 1979-10-17 1979-10-17 Resist patterning method and device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13447979A JPS5658236A (en) 1979-10-17 1979-10-17 Resist patterning method and device

Publications (1)

Publication Number Publication Date
JPS5658236A true JPS5658236A (en) 1981-05-21

Family

ID=15129281

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13447979A Pending JPS5658236A (en) 1979-10-17 1979-10-17 Resist patterning method and device

Country Status (1)

Country Link
JP (1) JPS5658236A (en)

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