JPS5654059A - Roduction of semiconductor device - Google Patents

Roduction of semiconductor device

Info

Publication number
JPS5654059A
JPS5654059A JP13011479A JP13011479A JPS5654059A JP S5654059 A JPS5654059 A JP S5654059A JP 13011479 A JP13011479 A JP 13011479A JP 13011479 A JP13011479 A JP 13011479A JP S5654059 A JPS5654059 A JP S5654059A
Authority
JP
Japan
Prior art keywords
layer
window
resistance
semiconductor device
photoresist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13011479A
Other languages
Japanese (ja)
Other versions
JPS6359259B2 (en
Inventor
Osamu Hataishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13011479A priority Critical patent/JPS5654059A/en
Publication of JPS5654059A publication Critical patent/JPS5654059A/en
Publication of JPS6359259B2 publication Critical patent/JPS6359259B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20—Resistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a desired resistance layer on a semiconductor device by applying a semicondutor layer on the surface of a semiconductor substrate through a photoresist layer having a window corresponding to a pattern on the resistance layer and removing the resist layer with the semiconductor layer thereof after injection of an impurity ions. CONSTITUTION:An SiO2 film 1 is applied on an Si substrate 4 where the base region 2 of a transistor and the like are formed and with a hole 3 etched at a position of the region 2, the film 1 is entirely covered with a photoresist layer 5. Then, a window 6 is provided on the photoresist layer 5 corresponding to a resistance layer pattern of a desired dimensions and a polycrystalline or amorphous Si layer 7 is stacked on the entire surface thereof covering the window 6 in such a manner as to be cut off in the window 6 and on the layer 5. Thereafter, an impurity ion is injected into the layer 7 so as to be given a desired resistance value and the layer 9 is all lifted off with the layer 5 leaving the portion generated in th window 6. This can provide a resistance layer with an accurate resistance yet linear in the current- voltage characteristics.
JP13011479A 1979-10-09 1979-10-09 Roduction of semiconductor device Granted JPS5654059A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13011479A JPS5654059A (en) 1979-10-09 1979-10-09 Roduction of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13011479A JPS5654059A (en) 1979-10-09 1979-10-09 Roduction of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5654059A true JPS5654059A (en) 1981-05-13
JPS6359259B2 JPS6359259B2 (en) 1988-11-18

Family

ID=15026279

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13011479A Granted JPS5654059A (en) 1979-10-09 1979-10-09 Roduction of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5654059A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58122769A (en) * 1982-01-18 1983-07-21 Seiko Epson Corp Manufacture of semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5374361A (en) * 1976-12-15 1978-07-01 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5374361A (en) * 1976-12-15 1978-07-01 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58122769A (en) * 1982-01-18 1983-07-21 Seiko Epson Corp Manufacture of semiconductor device

Also Published As

Publication number Publication date
JPS6359259B2 (en) 1988-11-18

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