JPS5646581A - Formation of pattern of niobium film - Google Patents

Formation of pattern of niobium film

Info

Publication number
JPS5646581A
JPS5646581A JP12237479A JP12237479A JPS5646581A JP S5646581 A JPS5646581 A JP S5646581A JP 12237479 A JP12237479 A JP 12237479A JP 12237479 A JP12237479 A JP 12237479A JP S5646581 A JPS5646581 A JP S5646581A
Authority
JP
Japan
Prior art keywords
film
region
niobium
retained
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12237479A
Other languages
Japanese (ja)
Inventor
Tadao Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP12237479A priority Critical patent/JPS5646581A/en
Publication of JPS5646581A publication Critical patent/JPS5646581A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To obtain an accurate pattern of a niobium film used for a Josephson element by covering a mask on the film of the region retained and roughing the surface upon ion injection on the film of the region to be removed when forming the pattern at the niobium film. CONSTITUTION:A niobium film 2 is covered on a substrate 1 made of semiconductor becoming insulator at the operating temperature of an element of insulator or silicon such as glass, sapphire or the like, and a gold film 4 is formed in thin film thereon. Subsequently, a mask of a resist film 3 is formed corresponding to the region of the film 2 thus retained, and the film 4 of the region exposed by etching is removed. Thereafter, with the resist film 3 and the retained film 4 as masks ions 5 of oxygen or the like are implanted to form niobium compound to be readily etched on the whole surface, and the surface of the film 2 exposed is roughed. Thus, the region from which the film 2 is removed is made to be feasibly etched, and etchant is prevented from intruding into the lower portion of the masks, and the film 2 of unnecessary portion is removed.
JP12237479A 1979-09-21 1979-09-21 Formation of pattern of niobium film Pending JPS5646581A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12237479A JPS5646581A (en) 1979-09-21 1979-09-21 Formation of pattern of niobium film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12237479A JPS5646581A (en) 1979-09-21 1979-09-21 Formation of pattern of niobium film

Publications (1)

Publication Number Publication Date
JPS5646581A true JPS5646581A (en) 1981-04-27

Family

ID=14834257

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12237479A Pending JPS5646581A (en) 1979-09-21 1979-09-21 Formation of pattern of niobium film

Country Status (1)

Country Link
JP (1) JPS5646581A (en)

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