JPS5645050A - Thin film integrated circuit - Google Patents

Thin film integrated circuit

Info

Publication number
JPS5645050A
JPS5645050A JP12066179A JP12066179A JPS5645050A JP S5645050 A JPS5645050 A JP S5645050A JP 12066179 A JP12066179 A JP 12066179A JP 12066179 A JP12066179 A JP 12066179A JP S5645050 A JPS5645050 A JP S5645050A
Authority
JP
Japan
Prior art keywords
slits
solder
electrode
thin film
covered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12066179A
Other languages
Japanese (ja)
Inventor
Hirosuke Kurihara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12066179A priority Critical patent/JPS5645050A/en
Publication of JPS5645050A publication Critical patent/JPS5645050A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
    • H01L2224/10152—Auxiliary members for bump connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/10175—Flow barriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01073—Tantalum [Ta]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To prevent contact with solder and a thin film circuit by providing extremely narrow slits on a semiconductor metal around soldering bumps wherein the slits and an electrode section are covered with polyimide resin. CONSTITUTION:Ta 22 is spattered on a glass substrate 22 to apply photoetching for patterning. Next a dielectric section 23 is formed by positive oxidation to evaporate Au for patterning. Slits 25 are installed at the pad sections 28 providing bumps 26 to prevent the flow of solder into an electrode section. And electrical connection is done through Ta films 22. Furthermore, the widths of the slits are about 30mu, about 1/10th compared to conventional slits. Next, the slits and whole thin film capacity element are covered with polyimide resin 27 to check the contact with the solder of the bumps 26 and an electrode 24 or the flow of solder into the electrode 24 at the time of assembly. In this composition, the slit width will be narrowed by onw figure and a stopper layer preventing the reaction with solder and electrode materials will not be required. Processes will be simplified and reliability is increased as the slits and the electrode section are covered with a polyimide resin P layer.
JP12066179A 1979-09-21 1979-09-21 Thin film integrated circuit Pending JPS5645050A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12066179A JPS5645050A (en) 1979-09-21 1979-09-21 Thin film integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12066179A JPS5645050A (en) 1979-09-21 1979-09-21 Thin film integrated circuit

Publications (1)

Publication Number Publication Date
JPS5645050A true JPS5645050A (en) 1981-04-24

Family

ID=14791760

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12066179A Pending JPS5645050A (en) 1979-09-21 1979-09-21 Thin film integrated circuit

Country Status (1)

Country Link
JP (1) JPS5645050A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59167088A (en) * 1983-03-14 1984-09-20 富士通株式会社 Method of producing integrated circuit device
JPS61145838A (en) * 1984-12-20 1986-07-03 Fujitsu Ltd Connecting method for semiconductor element

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59167088A (en) * 1983-03-14 1984-09-20 富士通株式会社 Method of producing integrated circuit device
JPH0148670B2 (en) * 1983-03-14 1989-10-20 Fujitsu Ltd
JPS61145838A (en) * 1984-12-20 1986-07-03 Fujitsu Ltd Connecting method for semiconductor element

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