KR810000190B1 - Printed circuit and method of making - Google Patents

Printed circuit and method of making Download PDF

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Publication number
KR810000190B1
KR810000190B1 KR740001120A KR740001120A KR810000190B1 KR 810000190 B1 KR810000190 B1 KR 810000190B1 KR 740001120 A KR740001120 A KR 740001120A KR 740001120 A KR740001120 A KR 740001120A KR 810000190 B1 KR810000190 B1 KR 810000190B1
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South Korea
Prior art keywords
printed circuit
conductive
film
insulating substrate
silver
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KR740001120A
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Korean (ko)
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스모투 오까
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가다오까 가쓰다로오
알프스덴기 가부시기 가이샤
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Priority to KR740001120A priority Critical patent/KR810000190B1/en
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Publication of KR810000190B1 publication Critical patent/KR810000190B1/en

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  • Non-Adjustable Resistors (AREA)

Abstract

An electronic printed circuit is produced by firstly forming an electric resistance layer on an insulating substrate at positions where resistors and conductive portions of the printed circuit are expected to be provided, and then applying a layer of electrically conductive substance over the electric resistance layer thus formed, at positions where the terminals and the conductive portions of the printed circuit are to be provided.

Description

전자회로의 인쇄 방법Printing method of electronic circuit

제1도는 본 발명의 실시예를 나타낸 평면도.1 is a plan view showing an embodiment of the present invention.

제2도는 종래의 가변저항기를 나타낸 평면도.2 is a plan view showing a conventional variable resistor.

본 발명은 전자회로의 인쇄 방법에 있어서 절연성기판의 표면에 먼저 저항 피막을 형성하고 이어서 저항 피막상에도 전체 피막을 형성하는 것을 특징으로 하는 것으로 그 목적은 간단한 공정에 의하여 염가로 생산하고 도전체간의 절연수명을 종래에 비하여 길게하는데 있다.The present invention is characterized in that in the printing method of an electronic circuit, a resistive film is first formed on a surface of an insulating substrate, and then an entire film is formed on the resistive film. Insulation life is longer than conventional.

종래 이 종류의 전자회로는 제2도에 나타낸 바와 같이 예컨대 페놀(phenol) 수지 절연기판(1') 및 전극피막(3')을 상호 약간의 중복부(7')를 두어 인쇄 성형한 것이었다.2. Description of the Related Art [0002] Conventionally, this type of electronic circuit has been formed by printing molding a phenol resin insulating substrate 1 'and an electrode coating 3' with some overlapping portions 7 'as shown in FIG.

그리고 전극피막(3')은 많은 경우 은(銀) 등의 금속입자를 포함한 도전성 페이스트(paste)를 도착건조하여 고형화시킨 것이었기 때문에 은(銀) 등의 금속입자가 페놀수지 절연기판에 직접 접촉하고 있는 경우에는 페놀수지 절연기판(적층판)의 보강용 섬유를 따라서 전계방향으로 이행(移行)하는 경향이 있으므로 장시간이 지나면 전극 피막 상호간의 절연이 불량하여 최종적으로는 양단자(兩端子)가 단락(短絡)하게 되어 저항기로서의 기능을 전혀 상실해 버리는 경우가 있고 전자기기의 고장의 원인이 되어 실용상 큰 장해로 되어 있었다. 그리고 상기와 같은 은(銀) 등의 금속입자의 이행 현상을 방지하기 위하여 페놀수지 절연기판상에 미리 적당한 수지피막을 형성하여 그 위에 도전성 은전극(銀電極) 및 저항피막을 형성하는 일이 행하여지고 있었으나 예비적인 수지 피막의 형성 때문에 제조 공정이 증가하여 원가가 높아지는 결점이 있었다.Since the electrode coating 3 'was obtained by drying and solidifying a conductive paste containing metal particles such as silver in many cases, metal particles such as silver were in direct contact with the phenol resin insulating substrate. In this case, the reinforcing fiber of the phenolic resin insulating board (laminated board) tends to shift in the electric field direction, so that after a long time, the insulation between the electrode coatings is poor, resulting in a short circuit between both terminals. (I) It may cause the loss of the function as a resistor at all, and it became the cause of the failure of an electronic device and became a big obstacle in practical use. In order to prevent the transition phenomenon of metal particles such as silver, an appropriate resin film is formed on a phenolic resin insulating substrate in advance, and a conductive silver electrode and a resistance film are formed thereon. However, due to the formation of a preliminary resin film, the manufacturing process was increased, resulting in a high cost.

본 발명은 상기의 결점을 해소한 것으로 이하 그 실시예를 제1도에 의거 설명한다.The present invention solves the above-mentioned drawbacks and the embodiment will be described below with reference to FIG.

예를 들면 페놀 수지 절연기판(1)의 표면에 먼저 도전부(3)를 설치하는 부분에도 밑층으로서 예컨대 탄소수지계 저항 피막(2)을 한가지 모양으로 형성하고, 다음에 도전부(3)를 설치하는 부분에 예컨대 도전성 은(銀) 페이스트 등과 같은 은(銀) 입자를 포함한 도전성 피막을 주변부(4)에 밑층의 저항 피막(2)이 약간의 폭만큼 잔존하는 상태로 도포, 소성(燒成)하여 도전부(3)를 형성한다.For example, the carbon resin-based resistive film 2 is formed in one shape as a lower layer on the surface of the phenolic resin insulating substrate 1, and the conductive portion 3 is provided next. A conductive film containing silver particles such as conductive silver paste or the like is applied to the portion to be formed in the peripheral portion 4 in such a state that the resistive film 2 of the underlying layer remains by a small width. The conductive portion 3 is formed.

본 발명에 의하면, 저항체(2)상의 도전부(3)는 페놀, 에폭시등의 절연기판(1)과는 직접으로 접촉하지 않으므로 전극 페이스트중의 은(銀) 등의 금속입자가 페놀, 에폭시 등의 절연기판의 보강용 섬유를 따라서 전계방향으로 이행하는 현상이 방지된다. 또 예비 코팅등의 공정을 행할 필요가 없고, 통상의 저항 피막과 도전 피막을 형성하는 단순한 2공정을 상술한 바와 같이 행할 뿐이므로 다른 여분의 추가 공정을 필요로 하지 않게되어 원자를 절감하고, 또한 도전부간의 절연수명을 길게하는 도전부(3)를 형성하는 것이 가능하다.According to the present invention, since the conductive portion 3 on the resistor 2 does not directly contact the insulating substrate 1 such as phenol or epoxy, metal particles such as silver in the electrode paste are phenol, epoxy or the like. The phenomenon of shifting in the electric field direction along the reinforcing fibers of the insulating substrate is prevented. In addition, there is no need to perform a process such as pre-coating, and since only two simple steps of forming a normal resistance film and a conductive film are performed as described above, other extra steps are not required, which further reduces atoms. It is possible to form the conductive portion 3 which lengthens the insulation life between the conductive portions.

또한 동 도면은 1개의 절연기판상에 각종의 회로 소자를 형성하는 전자회로의 예를 나타내는데 불과하고, 환상(環狀) 저항부(2), 대상(帶狀) 저항부(2a), 외부와의 접속단자(5)를 비롯하여 이것들을 접속하는 도전부(3)를 설치한 회로를 예시한 것이다.In addition, the figure only shows an example of an electronic circuit which forms various circuit elements on one insulating board, and it has the annular resistance part 2, the target resistance part 2a, and the outside. The circuit in which the electrically-conductive part 3 which connects these including the connection terminal 5 of these is provided is illustrated.

종래 도전부(30는 모두가 페놀 수지기판 등의 표면에 직접 형성하는 것이 보통이고, 은(銀) 등의 금속입자의 이행이 발생하는 개소가 다수 존재하므로 도전부(3) 상호간의 간격을 충분히 취할 필요가 있어, 그 때문에 회로를 소형화하는 것이 곤란했었다.Conventionally, all of the conductive portions 30 are formed directly on the surface of the phenol resin substrate or the like, and since there are many places where transition of metal particles such as silver occurs, there is a sufficient gap between the conductive portions 3. It was necessary to take it, which made it difficult to miniaturize the circuit.

그러므로 본 발명에 의하여 미리 전회로를 예컨대 탄소수지계와 같은 저항 피막에 의해서 형성한 후 그 위에 도전재료에 의하여 도전부(3)를 형성함으로써 은(銀) 등의 금속입자의 이행을 방지한 전자회로를 형성할 수 있으므로 도전부(3)의 상호의 간격은 상당히 적게할 수 있고 전자 부품의 소형화에 역할이 크다.Therefore, according to the present invention, the entire circuit is formed of a resistive film such as a carbon resin system in advance, and then the conductive portion 3 is formed of a conductive material thereon, thereby preventing the migration of metal particles such as silver. Since the distance between the conductive parts 3 can be considerably small, the role of miniaturization of electronic components is great.

근래 이와같이 프린트된 전자회로의 용도가 비약적으로 증가하는 상황이므로 본 발명의 공헌하는 분야는 극히 넓다. 또한 본 발명은 페놀 수지기판에 한하지 않고 세라믹 기판 등의 절연기판에 도전부를 형성하는 경우에도 응용할 수 있다.In recent years, since the use of the printed electronic circuit is increasing dramatically, the field of contribution of the present invention is extremely wide. In addition, the present invention can be applied not only to phenol resin substrates but also to forming conductive portions in insulating substrates such as ceramic substrates.

Claims (1)

절연기판(1)상에 저항 피막(2)에 의하여 저항체 및 도전로부분 등의 밑층(substrate)를 형성하고, 이 피막(2)상에 전극 혹은 도전로를 도전성 피막(3)에 의해 형성하는 것을 특징으로 하는 전자회로의 인쇄 방법.On the insulating substrate 1, a resistive film 2 is used to form a substrate, such as a resistor and a conductive path portion, and an electrode or conductive path is formed on the film 2 by the conductive film 3. A printing method of an electronic circuit, characterized in that.
KR740001120A 1974-01-04 1974-01-04 Printed circuit and method of making KR810000190B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR740001120A KR810000190B1 (en) 1974-01-04 1974-01-04 Printed circuit and method of making

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Application Number Priority Date Filing Date Title
KR740001120A KR810000190B1 (en) 1974-01-04 1974-01-04 Printed circuit and method of making

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KR810000190B1 true KR810000190B1 (en) 1981-03-02

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