JPS6451693A - Manufacture of electronic circuit substrate - Google Patents

Manufacture of electronic circuit substrate

Info

Publication number
JPS6451693A
JPS6451693A JP20961187A JP20961187A JPS6451693A JP S6451693 A JPS6451693 A JP S6451693A JP 20961187 A JP20961187 A JP 20961187A JP 20961187 A JP20961187 A JP 20961187A JP S6451693 A JPS6451693 A JP S6451693A
Authority
JP
Japan
Prior art keywords
conductive resin
circuit
circuit elements
layer
electroless plating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20961187A
Other languages
Japanese (ja)
Other versions
JP2537893B2 (en
Inventor
Hisashi Nakamura
Yoichi Haruta
Koji Nishida
Masaru Kawayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62209611A priority Critical patent/JP2537893B2/en
Publication of JPS6451693A publication Critical patent/JPS6451693A/en
Application granted granted Critical
Publication of JP2537893B2 publication Critical patent/JP2537893B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PURPOSE:To reduce the connection resistance inbetween circuit elements and a circuit conductor layer, and to improve the reliability of connection, by a method wherein small-sized circuit elements of plane connection type are mounted before conductive resin on which a circuit conductor layer is formed by screen printing method is not cured, and then an electronic circuit is constituted by depositing simultaneously a conducting metal layer on both a conductive resin layer fixed by an electroless plating and an external connection terminal layer for circuit elements. CONSTITUTION:On the main surface of an insulating substrate 5, paste composed of conductive resin 6 obtained by electroless plating is spread in a desired form of wiring circuit pattern, by screen printing art. Then, small-sized circuit elements 7 are mounted. External connection terminals 8, 8' of the circuit elements 7 are brought into contact with a part of conductive resin 6 in the uncured state, and then the conductive resin 6 is cured. One in which the small-sized circuit elements 7 are fixed at specified positions of an insulating substrate 5 with the conductive resin 6, is dipped in the electroless plating solution, and a conducting metal layer 9 is deposited on the surface of the conductive resin 6 fixed in the form of a wiring circuit, and on the external connection terminals 8, 8' of the circuit element 7.
JP62209611A 1987-08-24 1987-08-24 Electronic circuit board manufacturing method Expired - Lifetime JP2537893B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62209611A JP2537893B2 (en) 1987-08-24 1987-08-24 Electronic circuit board manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62209611A JP2537893B2 (en) 1987-08-24 1987-08-24 Electronic circuit board manufacturing method

Publications (2)

Publication Number Publication Date
JPS6451693A true JPS6451693A (en) 1989-02-27
JP2537893B2 JP2537893B2 (en) 1996-09-25

Family

ID=16575670

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62209611A Expired - Lifetime JP2537893B2 (en) 1987-08-24 1987-08-24 Electronic circuit board manufacturing method

Country Status (1)

Country Link
JP (1) JP2537893B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0592938A1 (en) * 1992-10-16 1994-04-20 AMEG Additive Metallisierung- Eentwicklungs und Anwendungsgesellschaft mbH Process for mounting and contacting electronic components on an insulating support

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0592938A1 (en) * 1992-10-16 1994-04-20 AMEG Additive Metallisierung- Eentwicklungs und Anwendungsgesellschaft mbH Process for mounting and contacting electronic components on an insulating support

Also Published As

Publication number Publication date
JP2537893B2 (en) 1996-09-25

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