JPS5627922A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5627922A
JPS5627922A JP10335679A JP10335679A JPS5627922A JP S5627922 A JPS5627922 A JP S5627922A JP 10335679 A JP10335679 A JP 10335679A JP 10335679 A JP10335679 A JP 10335679A JP S5627922 A JPS5627922 A JP S5627922A
Authority
JP
Japan
Prior art keywords
type
density
alloying
irradiation
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10335679A
Other languages
Japanese (ja)
Inventor
Kaoru Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10335679A priority Critical patent/JPS5627922A/en
Publication of JPS5627922A publication Critical patent/JPS5627922A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/24—Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To obtain a P-N junction without having deterioration in pressure resistance and an increased leak current by a method wherein a metallic thin film, to be formed into a P-type or an N-type, is formed after a heavy ion beam has been irradiated on a semiconductor surface and a high-density diffusion doped layer is provided by performing a heat treatment. CONSTITUTION:An irradiation and injection region 3 is formed on the surface of a P-type Si substrate 1 by irradiating a heavy ion beam 2 such as Ar and the like, and a high-density lattice defect or am amorphous layer is generated in proportion to the amount of irradiation. Then, a metal film which is an N-type impurity for Si such as an Sb film 4, for example, is vacuum-evaporated on the whole surface, a heat treatment is performed in an inert atmosphere and a high-density N-type impurity diffusion region 5 is formed by alloying a metal film and the Si substrate. As a result, performance of alloying is uniformalized and a high impurity density region is formed uniformly, thereby enabling to form a junction having little deterioration in pressure resistance and an increased leak current.
JP10335679A 1979-08-14 1979-08-14 Manufacture of semiconductor device Pending JPS5627922A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10335679A JPS5627922A (en) 1979-08-14 1979-08-14 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10335679A JPS5627922A (en) 1979-08-14 1979-08-14 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5627922A true JPS5627922A (en) 1981-03-18

Family

ID=14351846

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10335679A Pending JPS5627922A (en) 1979-08-14 1979-08-14 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5627922A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5223445A (en) * 1990-05-30 1993-06-29 Matsushita Electric Industrial Co., Ltd. Large angle ion implantation method
JPH08306802A (en) * 1995-04-28 1996-11-22 Nec Corp Manufacture of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5223445A (en) * 1990-05-30 1993-06-29 Matsushita Electric Industrial Co., Ltd. Large angle ion implantation method
JPH08306802A (en) * 1995-04-28 1996-11-22 Nec Corp Manufacture of semiconductor device

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