JPS56161663A - Thin film integrated circuit - Google Patents

Thin film integrated circuit

Info

Publication number
JPS56161663A
JPS56161663A JP6475180A JP6475180A JPS56161663A JP S56161663 A JPS56161663 A JP S56161663A JP 6475180 A JP6475180 A JP 6475180A JP 6475180 A JP6475180 A JP 6475180A JP S56161663 A JPS56161663 A JP S56161663A
Authority
JP
Japan
Prior art keywords
lead
plated
circuit
bonding
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6475180A
Other languages
Japanese (ja)
Inventor
Masahide Murakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP6475180A priority Critical patent/JPS56161663A/en
Publication of JPS56161663A publication Critical patent/JPS56161663A/en
Pending legal-status Critical Current

Links

Classifications

    • H10W70/093—

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To improve the bonding strength of a circuit to an external lead by bonding a tin-plated metallc lead onto a heated circuit substrate, thereby preventing the occurrence of a crack at the substrate. CONSTITUTION:When the conductor 2 of a circuit is bonded to an external lead 4, the lead 4 is tin-plated at 3, and is pressed to the conductor 2 on the ceramic substrate 1 heated at 100-200 deg.C (having a gold plating layer) and is thus bonded. Thus, it can be reduced by approx. 100 deg.C as compared with the case that it is gold plated at the time of bonding the lead, thereby alleviating the thermal stress. Thus, it can prevent the crack of a ceramic substrate, and can strengthen the bonding strength of the lead.
JP6475180A 1980-05-16 1980-05-16 Thin film integrated circuit Pending JPS56161663A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6475180A JPS56161663A (en) 1980-05-16 1980-05-16 Thin film integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6475180A JPS56161663A (en) 1980-05-16 1980-05-16 Thin film integrated circuit

Publications (1)

Publication Number Publication Date
JPS56161663A true JPS56161663A (en) 1981-12-12

Family

ID=13267178

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6475180A Pending JPS56161663A (en) 1980-05-16 1980-05-16 Thin film integrated circuit

Country Status (1)

Country Link
JP (1) JPS56161663A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5428889A (en) * 1991-09-09 1995-07-04 Hitachi Cable, Ltd. Method for manufacturing composite lead frame

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5428889A (en) * 1991-09-09 1995-07-04 Hitachi Cable, Ltd. Method for manufacturing composite lead frame

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