JPS56150868A - Manufacture of c-mos ic - Google Patents

Manufacture of c-mos ic

Info

Publication number
JPS56150868A
JPS56150868A JP5481380A JP5481380A JPS56150868A JP S56150868 A JPS56150868 A JP S56150868A JP 5481380 A JP5481380 A JP 5481380A JP 5481380 A JP5481380 A JP 5481380A JP S56150868 A JPS56150868 A JP S56150868A
Authority
JP
Japan
Prior art keywords
ions
type
channel part
injected
type channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5481380A
Other languages
Japanese (ja)
Inventor
Juri Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP5481380A priority Critical patent/JPS56150868A/en
Publication of JPS56150868A publication Critical patent/JPS56150868A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS

Abstract

PURPOSE:To perform a low drain resistance for a C-MOS IC without contamination by performing the stage of injecting ions for self-matching a gate part in combination with ions of different acceleration energy in such a manner that a trapezoidal density distribution is provided in a depth direction. CONSTITUTION:After an aluminum vapor deposited film 1 is covered on the overall surface, an N type channel part is retained as it is, a P type channel part is photoetched, and an aluminum gate is thus formed. Then, a resist is removed, and P type impurity ions 5 are so injected in combination with ions of different acceleration energy as to become a trapizoidal density distribution. Thereafter, an aluminum gate is etched and formed at the N type channel part, the resist is removed, and then N type ions 6 are injected in such a manner that a trapezoidal density distribution is provided. Since the N type ions 6 are injected also the P type channel part, the amounts of impurities of both types are so deterimined by considering the activation that a P<+> type layer is formed in the P type channel part. Thus, the impurity density on the surface of the substrate can be controlled. Since the ions are injected without using a resist mask, low resistance source and drain can be formed without contamination.
JP5481380A 1980-04-24 1980-04-24 Manufacture of c-mos ic Pending JPS56150868A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5481380A JPS56150868A (en) 1980-04-24 1980-04-24 Manufacture of c-mos ic

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5481380A JPS56150868A (en) 1980-04-24 1980-04-24 Manufacture of c-mos ic

Publications (1)

Publication Number Publication Date
JPS56150868A true JPS56150868A (en) 1981-11-21

Family

ID=12981138

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5481380A Pending JPS56150868A (en) 1980-04-24 1980-04-24 Manufacture of c-mos ic

Country Status (1)

Country Link
JP (1) JPS56150868A (en)

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