JPS56147451A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56147451A
JPS56147451A JP5086580A JP5086580A JPS56147451A JP S56147451 A JPS56147451 A JP S56147451A JP 5086580 A JP5086580 A JP 5086580A JP 5086580 A JP5086580 A JP 5086580A JP S56147451 A JPS56147451 A JP S56147451A
Authority
JP
Japan
Prior art keywords
si3n4
constitution
thick
reaction
cracked
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5086580A
Other languages
Japanese (ja)
Inventor
Fujiki Tokuyoshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5086580A priority Critical patent/JPS56147451A/en
Publication of JPS56147451A publication Critical patent/JPS56147451A/en
Pending legal-status Critical Current

Links

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To obtain an oxidation-resisting mask which is thick, durable and free from crystal defects by piling Si3N4 formed by plasma reaction on Si3N4 formed by thermochemical reaction. CONSTITUTION:The Si3N4 formed from SiH4 and NH3 by thermochemical reaction is readily cracked. Therefore, Si3N4 formed by plasma reaction, which is hardly cracked, is piled thereon. By said constitution, an Si3N4 structure which is thick and hardly cracked can be obtained. In addition, the film thickness automatically decreases at the pattern end of the Si3N4 film, so that thermal stress decreases, and because the stress, which is applied to the Si substrate when it goes it and out a high-temperature oven owing to the thermal expansion coefficient difference, is made small, an SiO2 structure having fewer defects can be selectively formed.
JP5086580A 1980-04-17 1980-04-17 Manufacture of semiconductor device Pending JPS56147451A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5086580A JPS56147451A (en) 1980-04-17 1980-04-17 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5086580A JPS56147451A (en) 1980-04-17 1980-04-17 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS56147451A true JPS56147451A (en) 1981-11-16

Family

ID=12870611

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5086580A Pending JPS56147451A (en) 1980-04-17 1980-04-17 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56147451A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6446935A (en) * 1987-08-17 1989-02-21 Nippon Telegraph & Telephone Growth method of thin film
JPH0412528A (en) * 1990-05-02 1992-01-17 Mitsubishi Electric Corp Manufacture of semiconductor device
JPH09326476A (en) * 1996-05-29 1997-12-16 Taiwan Moshii Denshi Kofun Yugenkoshi Method for forming memory using spacer of corrugated oxide layer
JPH10112529A (en) * 1996-10-03 1998-04-28 Taiwan Moshii Denshi Kofun Yugenkoshi Manufacture of high density stack dram
JPH10125870A (en) * 1996-10-11 1998-05-15 Taiwan Moshii Denshi Kofun Yugenkoshi Manufacture of stacked dram
JPH10163448A (en) * 1996-11-26 1998-06-19 Taiwan Moshii Denshi Kofun Yugenkoshi Manufacture of case-type capacitor having folds on single side
US6001697A (en) * 1998-03-24 1999-12-14 Mosel Vitelic Inc. Process for manufacturing semiconductor devices having raised doped regions

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6446935A (en) * 1987-08-17 1989-02-21 Nippon Telegraph & Telephone Growth method of thin film
JPH0412528A (en) * 1990-05-02 1992-01-17 Mitsubishi Electric Corp Manufacture of semiconductor device
JPH09326476A (en) * 1996-05-29 1997-12-16 Taiwan Moshii Denshi Kofun Yugenkoshi Method for forming memory using spacer of corrugated oxide layer
JPH10112529A (en) * 1996-10-03 1998-04-28 Taiwan Moshii Denshi Kofun Yugenkoshi Manufacture of high density stack dram
JPH10125870A (en) * 1996-10-11 1998-05-15 Taiwan Moshii Denshi Kofun Yugenkoshi Manufacture of stacked dram
JPH10163448A (en) * 1996-11-26 1998-06-19 Taiwan Moshii Denshi Kofun Yugenkoshi Manufacture of case-type capacitor having folds on single side
US6001697A (en) * 1998-03-24 1999-12-14 Mosel Vitelic Inc. Process for manufacturing semiconductor devices having raised doped regions

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