JPS56146237A - Manufacture of rock crystal and silicon element - Google Patents

Manufacture of rock crystal and silicon element

Info

Publication number
JPS56146237A
JPS56146237A JP4894280A JP4894280A JPS56146237A JP S56146237 A JPS56146237 A JP S56146237A JP 4894280 A JP4894280 A JP 4894280A JP 4894280 A JP4894280 A JP 4894280A JP S56146237 A JPS56146237 A JP S56146237A
Authority
JP
Japan
Prior art keywords
insulated substrate
anisotropic etching
layer
manufacture
shaped
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4894280A
Other languages
Japanese (ja)
Inventor
Toshitsugu Ueda
Fusao Kosaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Hokushin Electric Corp
Yokogawa Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Hokushin Electric Corp, Yokogawa Electric Works Ltd filed Critical Yokogawa Hokushin Electric Corp
Priority to JP4894280A priority Critical patent/JPS56146237A/en
Publication of JPS56146237A publication Critical patent/JPS56146237A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To form the element in a prescribed shape by a simple process by a method wherein a metallic pattern is formed on an insulated substrate capable of being applied an anisotropic etching, and the insulated substrate is etched with the metallic pattern as a mask. CONSTITUTION:There is shown an example in which a coil is formed on the insulated substrate and at the same time, the element is shaped in a prescribed shape. A Cr layer 21 and An layer 22 are attached in sequence on the insulated substrate 1 of a crystal plate and Si substrate etc. which can be applied the anisotropic etching, and further, a resist layer 3 is coated on the layers 21, 22. Then, an electrode, coil patterns 51, 52, 53 and frames 61, 62 to be formed on the insulated substrate 1 are formed by a photoetching. At this time, by suitably selecting intervals l1, l2 between the individual patterns, the insulated substrate 1 can be separated at a part of the large interval l1 in the anisotropic etching process successively applied. Thus, the element spontaneously shaped can be obtained in a simple process.
JP4894280A 1980-04-14 1980-04-14 Manufacture of rock crystal and silicon element Pending JPS56146237A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4894280A JPS56146237A (en) 1980-04-14 1980-04-14 Manufacture of rock crystal and silicon element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4894280A JPS56146237A (en) 1980-04-14 1980-04-14 Manufacture of rock crystal and silicon element

Publications (1)

Publication Number Publication Date
JPS56146237A true JPS56146237A (en) 1981-11-13

Family

ID=12817324

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4894280A Pending JPS56146237A (en) 1980-04-14 1980-04-14 Manufacture of rock crystal and silicon element

Country Status (1)

Country Link
JP (1) JPS56146237A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4855679A (en) * 1971-11-12 1973-08-04
JPS5086272A (en) * 1973-11-30 1975-07-11

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4855679A (en) * 1971-11-12 1973-08-04
JPS5086272A (en) * 1973-11-30 1975-07-11

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