JPS56138950A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS56138950A JPS56138950A JP4260980A JP4260980A JPS56138950A JP S56138950 A JPS56138950 A JP S56138950A JP 4260980 A JP4260980 A JP 4260980A JP 4260980 A JP4260980 A JP 4260980A JP S56138950 A JPS56138950 A JP S56138950A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- film
- region
- oxide film
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 150000004767 nitrides Chemical class 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 3
- 238000005530 etching Methods 0.000 abstract 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract 1
- 229910052782 aluminium Inorganic materials 0.000 abstract 1
- 239000007772 electrode material Substances 0.000 abstract 1
- 238000001704 evaporation Methods 0.000 abstract 1
- 239000012535 impurity Substances 0.000 abstract 1
- 239000000126 substance Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
PURPOSE:To prevent the improper shortcircuit with shallow junction in a semiconductor device by covering a part of a semiconductor substrate having a different conductivite type region with a polycrystalline silicon layer, covering a part thereon with a nitride film, and contacting the conductive substance with the polycrystalline layer to extend on the nitride film. CONSTITUTION:After an oxide film 2 is selectively formed on an N type Si substrate 1, impurity is diffused from the exposed part of the substrate 1, and the source and drain region 3 of P-channel MOS transistor having a junction depth of 0.2-1mum is formed. A polycrystalline Si layer 4 of 500-1,000Angstrom is formed thereon, and a nitride film layer 5 of the same thickness is further formed thereon. After etching the film 5 selectively, the film 2 of the gate and a part 6 of the layer 4 on the region 2 are removed, and a gate oxide film 7 is formed thereon. The gate oxide film on the region 3 is removed, and electrodes 8 of S, D, G and wires are formed by evaporating aluminum. Thus, it can prevent the improper shortcircuit with electrode material in shallow junction without increasing the number of etching steps.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4260980A JPS56138950A (en) | 1980-04-01 | 1980-04-01 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4260980A JPS56138950A (en) | 1980-04-01 | 1980-04-01 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56138950A true JPS56138950A (en) | 1981-10-29 |
Family
ID=12640765
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4260980A Pending JPS56138950A (en) | 1980-04-01 | 1980-04-01 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56138950A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5578873A (en) * | 1994-10-12 | 1996-11-26 | Micron Technology, Inc. | Integrated circuitry having a thin film polysilicon layer in ohmic contact with a conductive layer |
-
1980
- 1980-04-01 JP JP4260980A patent/JPS56138950A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5578873A (en) * | 1994-10-12 | 1996-11-26 | Micron Technology, Inc. | Integrated circuitry having a thin film polysilicon layer in ohmic contact with a conductive layer |
US5729055A (en) * | 1994-10-12 | 1998-03-17 | Micron Technology, Inc. | Integrated circuitry having a thin film polysilicon layer in ohmic contact with a conductive layer |
US5909631A (en) * | 1994-10-12 | 1999-06-01 | Micron Technology, Inc. | Method of making ohmic contact between a thin film polysilicon layer and a subsequently provided conductive layer and integrated circuitry |
US5930662A (en) * | 1994-10-12 | 1999-07-27 | Micron Technology, Inc. | Method of making ohmic contact between a thin film polysilicon layer and a subsequently provided conductive layer and integrated circuitry |
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