JPS56127231A - Controlling system of data transfer - Google Patents

Controlling system of data transfer

Info

Publication number
JPS56127231A
JPS56127231A JP3139680A JP3139680A JPS56127231A JP S56127231 A JPS56127231 A JP S56127231A JP 3139680 A JP3139680 A JP 3139680A JP 3139680 A JP3139680 A JP 3139680A JP S56127231 A JPS56127231 A JP S56127231A
Authority
JP
Japan
Prior art keywords
processor
data
control information
contents
port
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3139680A
Other languages
Japanese (ja)
Inventor
Shigeru Abe
Masaharu Hirayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3139680A priority Critical patent/JPS56127231A/en
Publication of JPS56127231A publication Critical patent/JPS56127231A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)

Abstract

PURPOSE:To ensure a high-speed transfer of data through a circuit of a simple constitution for a system which transfers the data among plural processors, by storing the control information on the transfer of data at an area for a centralized control. CONSTITUTION:While the first data is transferred from the processor 1c to the processor 1a and then from the processor 1b to 1d, the transfer controlling circuit 15 extracts the control information on the data transfer one by one out of the control storage device 12 with every process and based on a proper rule. The output port 8c of the processor 1c opens with the first control information, and the contents of the port 8c is delivered to the data bus 5. The input port 7a opens with the second control informtion, and then the contents of the port 8c of the processor 1c delivered to the bus 5 is taken into the processor 1a to be processed. After this, the output port 8b is opened by the extracted control information to deliver its contents. This contents are then taken into the input port 7d of the processor 1d by the following control information.
JP3139680A 1980-03-11 1980-03-11 Controlling system of data transfer Pending JPS56127231A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3139680A JPS56127231A (en) 1980-03-11 1980-03-11 Controlling system of data transfer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3139680A JPS56127231A (en) 1980-03-11 1980-03-11 Controlling system of data transfer

Publications (1)

Publication Number Publication Date
JPS56127231A true JPS56127231A (en) 1981-10-05

Family

ID=12330094

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3139680A Pending JPS56127231A (en) 1980-03-11 1980-03-11 Controlling system of data transfer

Country Status (1)

Country Link
JP (1) JPS56127231A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59108129A (en) * 1982-12-14 1984-06-22 Seiko Instr & Electronics Ltd Transferring method of data
JPS6151263A (en) * 1984-08-20 1986-03-13 Sanyo Electric Co Ltd Character recognizing device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59108129A (en) * 1982-12-14 1984-06-22 Seiko Instr & Electronics Ltd Transferring method of data
JPS6151263A (en) * 1984-08-20 1986-03-13 Sanyo Electric Co Ltd Character recognizing device

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