JPS57136241A - Data transfer system - Google Patents

Data transfer system

Info

Publication number
JPS57136241A
JPS57136241A JP2202281A JP2202281A JPS57136241A JP S57136241 A JPS57136241 A JP S57136241A JP 2202281 A JP2202281 A JP 2202281A JP 2202281 A JP2202281 A JP 2202281A JP S57136241 A JPS57136241 A JP S57136241A
Authority
JP
Japan
Prior art keywords
data
counter
address
cpu5
transferred
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2202281A
Other languages
Japanese (ja)
Inventor
Mitsuo Ishii
Yasushi Inamoto
Sadao Kodama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2202281A priority Critical patent/JPS57136241A/en
Publication of JPS57136241A publication Critical patent/JPS57136241A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)

Abstract

PURPOSE:To attain the transfer of data among peripheral devices with no intervention of a main storage device, by providing a channel controlling circuit containing an address counter, a data counter and a control circuit to the peripheral device. CONSTITUTION:Data is transferred to a peripheral device 8' from a peripheral device 8 via channel controllers 7 and 7' plus a common bus 9. In such a case, the device 8 sets the address of the device 8' to an address counter 15 of the device 7 by a command given from a CPU5' and then sets the number of data to be transferred to a data counter 13. The device 8' sets the number of data to be transmitted to a counter 13 of the device 7' under the control of the CPU5' in order to be ready for reception. The data are trnsferred one by one via the devices 7 and 7' by a command of the CPU5'. The counter 13 of the device 7 is counted down by one for every transmission of data. When the counter 13 is set at 0, the transfer of data is over. The device 7' fetches the transferred data when an address to the own station is detected and transfers the data to the device 8'. The counter 13 is counted down by one every time when the data is fetched. Then the transfer of data is over when the counter 13 is set at 0.
JP2202281A 1981-02-17 1981-02-17 Data transfer system Pending JPS57136241A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2202281A JPS57136241A (en) 1981-02-17 1981-02-17 Data transfer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2202281A JPS57136241A (en) 1981-02-17 1981-02-17 Data transfer system

Publications (1)

Publication Number Publication Date
JPS57136241A true JPS57136241A (en) 1982-08-23

Family

ID=12071353

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2202281A Pending JPS57136241A (en) 1981-02-17 1981-02-17 Data transfer system

Country Status (1)

Country Link
JP (1) JPS57136241A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6118060A (en) * 1984-07-04 1986-01-25 Nec Corp Data processing system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6118060A (en) * 1984-07-04 1986-01-25 Nec Corp Data processing system

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