JPS56118350A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS56118350A
JPS56118350A JP2075580A JP2075580A JPS56118350A JP S56118350 A JPS56118350 A JP S56118350A JP 2075580 A JP2075580 A JP 2075580A JP 2075580 A JP2075580 A JP 2075580A JP S56118350 A JPS56118350 A JP S56118350A
Authority
JP
Japan
Prior art keywords
mask
lines
connecting openings
preliminerily
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2075580A
Other languages
Japanese (ja)
Inventor
Mitsuhiro Koike
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI, CHO LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP2075580A priority Critical patent/JPS56118350A/en
Publication of JPS56118350A publication Critical patent/JPS56118350A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5382Adaptable interconnections, e.g. for engineering changes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To make it possible to connect each other by change of only one mask for wiring formation, shorten the development period and lower costs, by aligning in the identical direction the input/output lines to the devices on the substrate, covering them with insulating film and forming connecting windows at a fixed interval in the crossing direction with the lines. CONSTITUTION:A row of connecting openings 5101..., 5201... are preliminerily formed on the insulating film at a fixed interval and at a right angle to the alignments of the diffusion wiring layer 4 which is to be the input/output lines of a unit circuit 1. The interval with the adjacent row is so wide that two parallel lines of metal wiring can be mounted thereto. By means of a mask a metal wiring 6 is formed in the lateral direction. Any wirings can be made possible only by exchanging the mask. And because the positions of the connecting openings can be determined preliminerily for a master chip, the width of the wiring layer can be determined by only enlarging the connecting openings part, so that the parasitic volume decreases, resulting in the higher speed operations.
JP2075580A 1980-02-21 1980-02-21 Semiconductor integrated circuit device Pending JPS56118350A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2075580A JPS56118350A (en) 1980-02-21 1980-02-21 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2075580A JPS56118350A (en) 1980-02-21 1980-02-21 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS56118350A true JPS56118350A (en) 1981-09-17

Family

ID=12035998

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2075580A Pending JPS56118350A (en) 1980-02-21 1980-02-21 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS56118350A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57117254A (en) * 1981-01-14 1982-07-21 Nec Corp Master slice substrate
JPS5887854A (en) * 1981-11-20 1983-05-25 Nec Corp Master slice system lsi substrate
JPS61283143A (en) * 1985-06-10 1986-12-13 Nec Corp Semiconductor integrated circuit
JPS624342A (en) * 1985-06-28 1987-01-10 Mitsubishi Electric Corp Semiconductor integrated circuit device
JPS6298641A (en) * 1985-10-24 1987-05-08 Nec Corp Semiconductor integrated circuit
JPH02164064A (en) * 1988-12-19 1990-06-25 Rohm Co Ltd Manufacture of semiconductor integrated circuit
EP0649173A2 (en) * 1993-10-13 1995-04-19 Kawasaki Steel Corporation Semiconductor device adapted for a master slice approach and method for fabricating the same
US10580562B2 (en) 2015-03-27 2020-03-03 Epcos Ag Inductive component and method for producing an inductive component

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57117254A (en) * 1981-01-14 1982-07-21 Nec Corp Master slice substrate
JPS5887854A (en) * 1981-11-20 1983-05-25 Nec Corp Master slice system lsi substrate
JPS61283143A (en) * 1985-06-10 1986-12-13 Nec Corp Semiconductor integrated circuit
JPH0586866B2 (en) * 1985-06-10 1993-12-14 Nippon Electric Co
JPS624342A (en) * 1985-06-28 1987-01-10 Mitsubishi Electric Corp Semiconductor integrated circuit device
JPS6298641A (en) * 1985-10-24 1987-05-08 Nec Corp Semiconductor integrated circuit
JPH02164064A (en) * 1988-12-19 1990-06-25 Rohm Co Ltd Manufacture of semiconductor integrated circuit
EP0649173A2 (en) * 1993-10-13 1995-04-19 Kawasaki Steel Corporation Semiconductor device adapted for a master slice approach and method for fabricating the same
EP0649173A3 (en) * 1993-10-13 1995-07-26 Kawasaki Steel Co Semiconductor device adapted for a master slice approach and method for fabricating the same.
US5581097A (en) * 1993-10-13 1996-12-03 Kawasaki Steel Corporation Method of fabricating semiconductor device using shared contact hole masks and semiconductor device using same
US10580562B2 (en) 2015-03-27 2020-03-03 Epcos Ag Inductive component and method for producing an inductive component

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