JPS56111370A - Memory device of facsimile - Google Patents

Memory device of facsimile

Info

Publication number
JPS56111370A
JPS56111370A JP1300580A JP1300580A JPS56111370A JP S56111370 A JPS56111370 A JP S56111370A JP 1300580 A JP1300580 A JP 1300580A JP 1300580 A JP1300580 A JP 1300580A JP S56111370 A JPS56111370 A JP S56111370A
Authority
JP
Japan
Prior art keywords
memory
input
port
output ports
encoding signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1300580A
Other languages
Japanese (ja)
Inventor
Yoshio Maniwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP1300580A priority Critical patent/JPS56111370A/en
Publication of JPS56111370A publication Critical patent/JPS56111370A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Storing Facsimile Image Data (AREA)

Abstract

PURPOSE:To make a fraction of the memory area minimum even if it is used discontinuously as time, and elevate the working efficiency, by using the memory area after dividing it into plural parts by a prescribed fixed data length and also chaining them, in case when an encoding signal is inputted to the memory device. CONSTITUTION:An encoding signal is inputted and outputted to the memory 3a through the input/output ports 11-14, and each port 11-14 is connected to the memory 3a by means of time division by utilizing a time when the encoding signal VD reaches the number of transfer unit bits of the memory 3a. Accordingly, each input/output port 11-14 can all be operated at the same time. Also, when the transfer speed is enough by increasing the number of input/output ports, plural scanning read part, scanning record part, transmission part, receiving part, etc. can be set. The input/output ports 11-14 are all controlled by the port control circuits 15-18, the sequence of all the pages and the start strip of each port controlling circuit 15-18 are controlled by the central processing unit 22, and the central processing unit is operated in accordance with a command from the system controlling device 10.
JP1300580A 1980-02-07 1980-02-07 Memory device of facsimile Pending JPS56111370A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1300580A JPS56111370A (en) 1980-02-07 1980-02-07 Memory device of facsimile

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1300580A JPS56111370A (en) 1980-02-07 1980-02-07 Memory device of facsimile

Publications (1)

Publication Number Publication Date
JPS56111370A true JPS56111370A (en) 1981-09-03

Family

ID=11821055

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1300580A Pending JPS56111370A (en) 1980-02-07 1980-02-07 Memory device of facsimile

Country Status (1)

Country Link
JP (1) JPS56111370A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60100872A (en) * 1984-08-23 1985-06-04 Canon Inc Picture processor
JPS60140975A (en) * 1983-12-27 1985-07-25 Fujitsu Ltd Control system of buffer memory
JPS62285574A (en) * 1986-06-04 1987-12-11 Nec Corp Facsimile equipment
JPH02146870A (en) * 1989-07-19 1990-06-06 Hitachi Ltd Facsimile equipment
JPH06113150A (en) * 1992-10-19 1994-04-22 Hitachi Ltd Decoder
JPH06164945A (en) * 1993-09-10 1994-06-10 Hitachi Ltd Facsimile equipment
JPH07264418A (en) * 1995-02-17 1995-10-13 Hitachi Ltd Picture signal coding system
JPH07274008A (en) * 1995-02-17 1995-10-20 Hitachi Ltd Facsimile equipment
JPH08228293A (en) * 1995-12-27 1996-09-03 Canon Inc Image processor

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60140975A (en) * 1983-12-27 1985-07-25 Fujitsu Ltd Control system of buffer memory
JPS60100872A (en) * 1984-08-23 1985-06-04 Canon Inc Picture processor
JPS62285574A (en) * 1986-06-04 1987-12-11 Nec Corp Facsimile equipment
JPH02146870A (en) * 1989-07-19 1990-06-06 Hitachi Ltd Facsimile equipment
JPH06113150A (en) * 1992-10-19 1994-04-22 Hitachi Ltd Decoder
JPH06164945A (en) * 1993-09-10 1994-06-10 Hitachi Ltd Facsimile equipment
JPH07264418A (en) * 1995-02-17 1995-10-13 Hitachi Ltd Picture signal coding system
JPH07274008A (en) * 1995-02-17 1995-10-20 Hitachi Ltd Facsimile equipment
JPH08228293A (en) * 1995-12-27 1996-09-03 Canon Inc Image processor

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