JPS5525153A - Information processing system - Google Patents

Information processing system

Info

Publication number
JPS5525153A
JPS5525153A JP9817278A JP9817278A JPS5525153A JP S5525153 A JPS5525153 A JP S5525153A JP 9817278 A JP9817278 A JP 9817278A JP 9817278 A JP9817278 A JP 9817278A JP S5525153 A JPS5525153 A JP S5525153A
Authority
JP
Japan
Prior art keywords
page
register
memory
data channel
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9817278A
Other languages
Japanese (ja)
Inventor
Yoshiharu Taki
Haruo Wakabayashi
Tadakazu Morisawa
Tatsuo Ushiki
Tomihide Seo
Shinji Tachika
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP9817278A priority Critical patent/JPS5525153A/en
Publication of JPS5525153A publication Critical patent/JPS5525153A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To improve the function of a system by increasing the versatility of software by providing a page register in a data channel unit, by inputting and outputting the address information of this register by input and output command words, and by performing page transfer on each channel actuation.
CONSTITUTION: An address space which can be assigned by a single instruction is regarded as a unit page and a plural number of this pages are stored in memory 1. To attain access to memory 1 from data channel unit 2, the output of page register 5 is used which is provided in data channel unit 2 and is stored with page address information. Then, this page register 5 is set by input and output operation command words and to this page register 5, page address transmitting gate 6 which sends page address in memory access and fixed-page assignment jumper circuit 8 are connected so as to send addresses to memory 1 and also to transfer jumper setting discrimination signal 9 to the control circuit.
COPYRIGHT: (C)1980,JPO&Japio
JP9817278A 1978-08-14 1978-08-14 Information processing system Pending JPS5525153A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9817278A JPS5525153A (en) 1978-08-14 1978-08-14 Information processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9817278A JPS5525153A (en) 1978-08-14 1978-08-14 Information processing system

Publications (1)

Publication Number Publication Date
JPS5525153A true JPS5525153A (en) 1980-02-22

Family

ID=14212619

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9817278A Pending JPS5525153A (en) 1978-08-14 1978-08-14 Information processing system

Country Status (1)

Country Link
JP (1) JPS5525153A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61286279A (en) * 1985-06-13 1986-12-16 新日本製鐵株式会社 Manufacture of high strength inorganic formed body

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61286279A (en) * 1985-06-13 1986-12-16 新日本製鐵株式会社 Manufacture of high strength inorganic formed body
JPH037620B2 (en) * 1985-06-13 1991-02-04 Shinnippon Seitetsu Kk

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