JPS5730014A - Input and output system - Google Patents

Input and output system

Info

Publication number
JPS5730014A
JPS5730014A JP10458380A JP10458380A JPS5730014A JP S5730014 A JPS5730014 A JP S5730014A JP 10458380 A JP10458380 A JP 10458380A JP 10458380 A JP10458380 A JP 10458380A JP S5730014 A JPS5730014 A JP S5730014A
Authority
JP
Japan
Prior art keywords
adaptor
input
register
data transfer
output controller
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10458380A
Other languages
Japanese (ja)
Inventor
Hiroyuki Koarai
Shin Maeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10458380A priority Critical patent/JPS5730014A/en
Publication of JPS5730014A publication Critical patent/JPS5730014A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To save the hardware, by making data transfer in the form that respective input and output controllers perform read/write processing to a control register group used commonly provided on an adaptor. CONSTITUTION:An adaptor 8 having an inpt/output controller starting register 9, interruption register 10 to a central processing unit 1 and one or a plurality of control register groups 11 is provided to a bus 3 correspondingly. The central processing unit 1 sets input/output controller starting information to the input/output controller starting register 9 on the adaptor 8 and an input and output controller 4 started correspondingly via the adaptor 8 reads out a channel control word on a main memory to a control register group 11 on the adaptor, sets it and executes data transfer. Thus, the data transfer is made between the data buffer areas on the main memory and it is informed to the central processing unit 1 via an interruption register on the adaptor 8 at the end of data transfer.
JP10458380A 1980-07-30 1980-07-30 Input and output system Pending JPS5730014A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10458380A JPS5730014A (en) 1980-07-30 1980-07-30 Input and output system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10458380A JPS5730014A (en) 1980-07-30 1980-07-30 Input and output system

Publications (1)

Publication Number Publication Date
JPS5730014A true JPS5730014A (en) 1982-02-18

Family

ID=14384450

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10458380A Pending JPS5730014A (en) 1980-07-30 1980-07-30 Input and output system

Country Status (1)

Country Link
JP (1) JPS5730014A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6085775A (en) * 1983-10-19 1985-05-15 オムロン株式会社 Game stand controller
JPS60119975A (en) * 1983-12-05 1985-06-27 オムロン株式会社 Time data collector of play machine
JPS6097180U (en) * 1983-12-06 1985-07-02 ユー・エス・エス方式自動補球工事有限会社 Centralized management device for pachinko machines
JPS60237556A (en) * 1984-05-09 1985-11-26 Fuji Facom Corp Data transfer control system
JPS6110788U (en) * 1984-06-22 1986-01-22 ダイコク電機株式会社 Pachinko game machine data management device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6085775A (en) * 1983-10-19 1985-05-15 オムロン株式会社 Game stand controller
JPS60119975A (en) * 1983-12-05 1985-06-27 オムロン株式会社 Time data collector of play machine
JPS6097180U (en) * 1983-12-06 1985-07-02 ユー・エス・エス方式自動補球工事有限会社 Centralized management device for pachinko machines
JPS60237556A (en) * 1984-05-09 1985-11-26 Fuji Facom Corp Data transfer control system
JPS6110788U (en) * 1984-06-22 1986-01-22 ダイコク電機株式会社 Pachinko game machine data management device

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