JPS56105641A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS56105641A
JPS56105641A JP817580A JP817580A JPS56105641A JP S56105641 A JPS56105641 A JP S56105641A JP 817580 A JP817580 A JP 817580A JP 817580 A JP817580 A JP 817580A JP S56105641 A JPS56105641 A JP S56105641A
Authority
JP
Japan
Prior art keywords
implanted
ions
constitution
heat
crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP817580A
Other languages
Japanese (ja)
Other versions
JPH0235457B2 (en
Inventor
Makoto Uehara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP817580A priority Critical patent/JPH0235457B2/en
Publication of JPS56105641A publication Critical patent/JPS56105641A/en
Publication of JPH0235457B2 publication Critical patent/JPH0235457B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Optics & Photonics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To remove the crystal defect of the semiconductor device by a method wherein after P or Ar ions are implanted in a high concentration in the surface of single crystalline Si substrate, the surface region is annealed. CONSTITUTION:P or Ar ions are implanted in the single crystalline Si sufficiently deeper than an active region. At this time, the crystal defects 14 caused by the ion implantation are generated in the surface side of the formed getter layer 10. When it is heat-treated to anneal by a laser beam 16, the single crystal in the surface side 17 of the getter layer 10 is restored. By this constitution, because the getter effect is elevated, the heat-treatment temperature is reduced, necessary time can be shortened and moreover no restriction exists in the condition of the back face, so that the adhesion with a package, the ohmic interconnection can be insured sufficiently.
JP817580A 1980-01-25 1980-01-25 HANDOTAISOCHINOSEIZOHOHO Expired - Lifetime JPH0235457B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP817580A JPH0235457B2 (en) 1980-01-25 1980-01-25 HANDOTAISOCHINOSEIZOHOHO

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP817580A JPH0235457B2 (en) 1980-01-25 1980-01-25 HANDOTAISOCHINOSEIZOHOHO

Publications (2)

Publication Number Publication Date
JPS56105641A true JPS56105641A (en) 1981-08-22
JPH0235457B2 JPH0235457B2 (en) 1990-08-10

Family

ID=11685977

Family Applications (1)

Application Number Title Priority Date Filing Date
JP817580A Expired - Lifetime JPH0235457B2 (en) 1980-01-25 1980-01-25 HANDOTAISOCHINOSEIZOHOHO

Country Status (1)

Country Link
JP (1) JPH0235457B2 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5844726A (en) * 1981-09-11 1983-03-15 Nippon Telegr & Teleph Corp <Ntt> Gettering method
JPS5854672A (en) * 1981-09-28 1983-03-31 Fujitsu Ltd Semiconductor device
US5098852A (en) * 1989-07-05 1992-03-24 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor device by mega-electron volt ion implantation
US5151766A (en) * 1989-05-18 1992-09-29 Asea Brown Boveri Ltd. Semiconductor component
US5229305A (en) * 1992-02-03 1993-07-20 Motorola, Inc. Method for making intrinsic gettering sites in bonded substrates
EP1032027A2 (en) * 1999-02-22 2000-08-30 Intersil Corporation Method for forming a bonded substrate containing a planar intrinsic gettering zone and substrate formed by said method

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5844726A (en) * 1981-09-11 1983-03-15 Nippon Telegr & Teleph Corp <Ntt> Gettering method
JPS6229894B2 (en) * 1981-09-11 1987-06-29 Nippon Telegraph & Telephone
JPS5854672A (en) * 1981-09-28 1983-03-31 Fujitsu Ltd Semiconductor device
US5151766A (en) * 1989-05-18 1992-09-29 Asea Brown Boveri Ltd. Semiconductor component
US5098852A (en) * 1989-07-05 1992-03-24 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor device by mega-electron volt ion implantation
US5229305A (en) * 1992-02-03 1993-07-20 Motorola, Inc. Method for making intrinsic gettering sites in bonded substrates
EP1032027A2 (en) * 1999-02-22 2000-08-30 Intersil Corporation Method for forming a bonded substrate containing a planar intrinsic gettering zone and substrate formed by said method
EP1032027A3 (en) * 1999-02-22 2004-11-24 Intersil Corporation Method for forming a bonded substrate containing a planar intrinsic gettering zone and substrate formed by said method

Also Published As

Publication number Publication date
JPH0235457B2 (en) 1990-08-10

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