JPS5587458A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5587458A JPS5587458A JP16264178A JP16264178A JPS5587458A JP S5587458 A JPS5587458 A JP S5587458A JP 16264178 A JP16264178 A JP 16264178A JP 16264178 A JP16264178 A JP 16264178A JP S5587458 A JPS5587458 A JP S5587458A
- Authority
- JP
- Japan
- Prior art keywords
- film
- wiring
- layer
- sio
- films
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE: To provide high wiring flexibility and large-scale integrated multilayer wiring by laminating two tiers of high-resistant Si wiring layer with an oxidized film and a nitrized film on Si substrate and further laminating Al layer of high conductivity with PSG film on the former wiring layers, employing the CVD method.
CONSTITUTION: SiO2 thick film 2 and SiO2 thin film 3 for inter-element insulation are laminated on Si substrate 1. Then Si layer 4, SiO2 film 5 and Si3N4 film 6 are laminated on the former films based on the CVD method. Following this procedure, the integrated films are photographically etched. First, films 5, 4, 3 are etched and removed with fluoric acid liquid and fluoronitric acid liquid using a mask obtained by etching with heated phosphoric acid. Next, an exposed substrate surface is covered with SiO2 film 7 having the same thickness as film 5. After this step, again polysilicon layer 8 is laminated and photographically etched by the CVD method. Films 6, 5 are then etched and removed using a mask obtained and covered by PSG 9. Later, Al wiring 10aW10c is formed on film 9 by making openings N1WN3 simultaneously. Under this constitution, the polysilicon layer can be used as gate electrode and wiring layer, and a semi-conductor apparatus with high wiring flexibility and laminating capability can be constituted.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16264178A JPS5587458A (en) | 1978-12-25 | 1978-12-25 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16264178A JPS5587458A (en) | 1978-12-25 | 1978-12-25 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5587458A true JPS5587458A (en) | 1980-07-02 |
Family
ID=15758472
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16264178A Pending JPS5587458A (en) | 1978-12-25 | 1978-12-25 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5587458A (en) |
-
1978
- 1978-12-25 JP JP16264178A patent/JPS5587458A/en active Pending
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