JPS5586225A - Binary counter - Google Patents

Binary counter

Info

Publication number
JPS5586225A
JPS5586225A JP15863378A JP15863378A JPS5586225A JP S5586225 A JPS5586225 A JP S5586225A JP 15863378 A JP15863378 A JP 15863378A JP 15863378 A JP15863378 A JP 15863378A JP S5586225 A JPS5586225 A JP S5586225A
Authority
JP
Japan
Prior art keywords
complementary
outputs
inverters
cascade
nearly
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15863378A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6111489B2 (enrdf_load_stackoverflow
Inventor
Hiroyuki Kikuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP15863378A priority Critical patent/JPS5586225A/ja
Publication of JPS5586225A publication Critical patent/JPS5586225A/ja
Publication of JPS6111489B2 publication Critical patent/JPS6111489B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/40—Gating or clocking signals applied to all stages, i.e. synchronous counters
    • H03K23/50—Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits
    • H03K23/52—Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits using field-effect transistors

Landscapes

  • Logic Circuits (AREA)
  • Manipulation Of Pulses (AREA)
JP15863378A 1978-12-25 1978-12-25 Binary counter Granted JPS5586225A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15863378A JPS5586225A (en) 1978-12-25 1978-12-25 Binary counter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15863378A JPS5586225A (en) 1978-12-25 1978-12-25 Binary counter

Publications (2)

Publication Number Publication Date
JPS5586225A true JPS5586225A (en) 1980-06-28
JPS6111489B2 JPS6111489B2 (enrdf_load_stackoverflow) 1986-04-03

Family

ID=15675966

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15863378A Granted JPS5586225A (en) 1978-12-25 1978-12-25 Binary counter

Country Status (1)

Country Link
JP (1) JPS5586225A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03121193U (enrdf_load_stackoverflow) * 1990-03-26 1991-12-11

Also Published As

Publication number Publication date
JPS6111489B2 (enrdf_load_stackoverflow) 1986-04-03

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