JPS53110437A - Logic circuit - Google Patents
Logic circuitInfo
- Publication number
- JPS53110437A JPS53110437A JP2620977A JP2620977A JPS53110437A JP S53110437 A JPS53110437 A JP S53110437A JP 2620977 A JP2620977 A JP 2620977A JP 2620977 A JP2620977 A JP 2620977A JP S53110437 A JPS53110437 A JP S53110437A
- Authority
- JP
- Japan
- Prior art keywords
- logic circuit
- circuit
- circuits
- input
- speed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To make the speed of the circuit higher, in which uses ROM, decoder circuit and random gate circuit using multiple input NOR circuits, by remarkably reducing the delay time long in multiplex input NOR circuits.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2620977A JPS53110437A (en) | 1977-03-09 | 1977-03-09 | Logic circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2620977A JPS53110437A (en) | 1977-03-09 | 1977-03-09 | Logic circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS53110437A true JPS53110437A (en) | 1978-09-27 |
JPS5713174B2 JPS5713174B2 (en) | 1982-03-16 |
Family
ID=12187050
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2620977A Granted JPS53110437A (en) | 1977-03-09 | 1977-03-09 | Logic circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS53110437A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6331313A (en) * | 1986-07-21 | 1988-02-10 | シ−メンス、アクチエンゲゼルシヤフト | Integratable circuit device for level conversion |
JPH05103961A (en) * | 1991-10-14 | 1993-04-27 | Kyowa Densen Kk | Falling and mixing method of pellet and device therefor |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6036179U (en) * | 1983-08-12 | 1985-03-12 | 株式会社 潤工社 | document binding tool |
JPS60133843U (en) * | 1984-02-16 | 1985-09-06 | コニカ株式会社 | Paper feeding device |
JPS63196387A (en) * | 1987-02-12 | 1988-08-15 | 谷口 喜秋 | Scattering prevention of needle |
JPH0340086U (en) * | 1989-08-31 | 1991-04-17 | ||
JPH0344570U (en) * | 1989-09-07 | 1991-04-25 | ||
JPH0365678U (en) * | 1989-10-30 | 1991-06-26 |
-
1977
- 1977-03-09 JP JP2620977A patent/JPS53110437A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6331313A (en) * | 1986-07-21 | 1988-02-10 | シ−メンス、アクチエンゲゼルシヤフト | Integratable circuit device for level conversion |
JPH05103961A (en) * | 1991-10-14 | 1993-04-27 | Kyowa Densen Kk | Falling and mixing method of pellet and device therefor |
Also Published As
Publication number | Publication date |
---|---|
JPS5713174B2 (en) | 1982-03-16 |
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