JPS5575268A - Manufacturing method of nonvolatile semiconductor memory - Google Patents

Manufacturing method of nonvolatile semiconductor memory

Info

Publication number
JPS5575268A
JPS5575268A JP15032878A JP15032878A JPS5575268A JP S5575268 A JPS5575268 A JP S5575268A JP 15032878 A JP15032878 A JP 15032878A JP 15032878 A JP15032878 A JP 15032878A JP S5575268 A JPS5575268 A JP S5575268A
Authority
JP
Japan
Prior art keywords
film
grains
electrons
capturing
centers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15032878A
Other languages
Japanese (ja)
Other versions
JPS6239548B2 (en
Inventor
Tatsuo Fuji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15032878A priority Critical patent/JPS5575268A/en
Publication of JPS5575268A publication Critical patent/JPS5575268A/en
Publication of JPS6239548B2 publication Critical patent/JPS6239548B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/792Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors

Abstract

PURPOSE:To improve the characteristics of a nonvolatile memory, by causing very fine grains of a metal to adhere to the surface of a dielectric layer provided on a semiconductor and thereafter laminating an impurity-added dielectric layer on the grains. CONSTITUTION:An SiO2 film is produced on a metal-oxide-semiconductor gate manufacturing part of a p-type silicon substrate. Very fine grains of tungsten are evaporated as centers for capturing electrons or positive holes, no the entire surface of the SiO2 film. An Si3N4 film is coated on the grains. Since capturing centers present in the Si3N4 film have affinity to negative charge, the density of the capturing centers is greatly reduced by adding an easily negatively chargeable substance such as chlorine to the film. Therefore, hopping conduction due to an electric field generated by caputured electrons is very low and a storage holding property is improved. Because the density distribution of the captured electrons is limited within the vicinity of the boundary between the SiO2 and the Si3N4 films, an erasing property is improved. This results in improving the characteristics of a nonvolatile n-channel MOSFET memory which can act rapidly.
JP15032878A 1978-12-04 1978-12-04 Manufacturing method of nonvolatile semiconductor memory Granted JPS5575268A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15032878A JPS5575268A (en) 1978-12-04 1978-12-04 Manufacturing method of nonvolatile semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15032878A JPS5575268A (en) 1978-12-04 1978-12-04 Manufacturing method of nonvolatile semiconductor memory

Publications (2)

Publication Number Publication Date
JPS5575268A true JPS5575268A (en) 1980-06-06
JPS6239548B2 JPS6239548B2 (en) 1987-08-24

Family

ID=15494608

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15032878A Granted JPS5575268A (en) 1978-12-04 1978-12-04 Manufacturing method of nonvolatile semiconductor memory

Country Status (1)

Country Link
JP (1) JPS5575268A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4917981A (en) * 1972-06-07 1974-02-16

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4917981A (en) * 1972-06-07 1974-02-16

Also Published As

Publication number Publication date
JPS6239548B2 (en) 1987-08-24

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