JPS6146964B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method suitable for manufacturing a semiconductor device that requires a step of implanting ions into a semiconductor wafer having an insulating film on its surface.

Generally, when manufacturing semiconductor devices, there are quite a number of steps in which ions are implanted with an insulating film formed on the surface of a semiconductor wafer. In this case, ions are not only implanted into the necessary areas, but also onto the insulating film, so the potential gradually rises due to charge-up of the insulating film, eventually exceeding the withstand voltage of the insulating film. , accidents resulting in insulation breakdown often occur.

In order to avoid this, the inventor first etched grooves in the insulating film to expose the semiconductor bulk surface so as to divide the semiconductor wafer into predetermined areas, and the predetermined area of the insulating film was charged by ordinary ion implantation.
For example, Japanese Patent Application No. 158322/1983 provided a technique that prevents dielectric breakdown from occurring even if the area is charged up by the amount of charge that is charged up.

According to this existing technique, dielectric breakdown of the insulating film can be prevented to a considerable extent, but it cannot be said to be perfect if the amount of ions implanted per unit time increases significantly.

The present invention is based on new findings obtained since then.
This is an attempt to further improve the technique of preventing dielectric breakdown by cutting etching grooves into the insulating film of a semiconductor wafer to expose the semiconductor bulk surface and dividing the insulating film into predetermined areas. will be explained in detail.

In the present invention, when ions are implanted into an insulating film such as silicon dioxide, the energy of the ions is absorbed near the surface of the insulating film, generating electron-hole pairs, and the electrons or holes become carriers. The basis of this method is the knowledge that the charge of the implanted ions is transported in the same way as the implanted ions.

In this way, when ions are implanted into an insulating film, the generation of electrons or holes that carry the charge of the implanted ions can be considered to be the formation of a conductive layer (or a high resistance layer) on the surface of the insulating film. Note that since the electron-hole pairs are unevenly distributed near the region into which ions have entered, the conductive layer substantially formed by ion implantation is limited to the vicinity of the surface of the insulating film.

Figure 1 explains this state, where 1 shows a semiconductor substrate, 2 shows an insulating film, 2A shows a substantial conductive layer formed by ion implantation, and 3 shows a groove formed in the insulating film. .

By the way, the insulating film 2 usually has side surfaces that stand up at approximately right angles as shown in the figure. Therefore, the conductive layer 2A
are not formed on the sides.

However, since such a conductive layer 2A is formed, if this conductive layer 2A is made to be able to communicate with the semiconductor substrate 1 by appropriate means,
Charge-up in the insulating film 2 should be almost eliminated. Note that when applying the ion implantation method, the semiconductor substrate 1 is usually grounded.

Now, in the present invention, the surface of the insulating film and the surface of the semiconductor substrate are connected by a polycrystalline silicon film. That is, FIG. 2 is a side cross-sectional view of a main part of a semiconductor wafer for explaining the principle of the present invention, in which 11 is a semiconductor substrate, 12 is an insulating film, and 13 is a part exposed in a groove formed in the insulating film 12. a polycrystalline silicon film connecting the surface of the semiconductor substrate 11 and the surface of the insulating film 12;
12A is a conductive layer formed on the surface of the insulating film 12.

As is clear from the figure, the conductive layer 12A formed on the surface of the insulating film 12 by ion implantation is connected to the semiconductor substrate 11 by the polycrystalline silicon film 13, which is made conductive by the ion implantation. ing. Therefore, the charges accumulated in the insulating film 12 are released to the semiconductor substrate 11 via the polycrystalline silicon film 13, so that dielectric breakdown of the insulating film 12 does not occur. still,
The polycrystalline silicon film 13 may be made conductive by containing impurities in advance.

Formation of a polycrystalline silicon film connecting an insulating film and a semiconductor substrate in the present invention is particularly advantageous in, for example, manufacturing a silicon gate MIS field effect semiconductor device. This will be explained with reference to FIG.

(1) A thick insulating film 12 for a field is formed on a semiconductor substrate 11. This insulating film 12 may be a thermal oxide film.

(2) The insulating film 12 is patterned using normal photolithography technology to form openings for element formation regions and grooves dividing the insulating film 12 into predetermined areas. Note that the surface of the semiconductor substrate 11 is exposed inside the opening and the groove.

(3) Form a thin insulating film inside the opening. At this time,
Unless a special process is adopted, a thin insulating film is also formed within the trench. These insulating films may be thermally oxidized films.

(4) If an insulating film is formed in the trench, it is removed and then a polycrystalline silicon film is formed by, for example, chemical vapor deposition.

(5) The polycrystalline silicon film is patterned by applying ordinary photolithography technology to form a connecting polycrystalline silicon film 13 and a silicon gate 14 that connect the semiconductor substrate 11 and the insulating film 12.

(6) Using the silicon gate 14 as a mask, etching the thin insulating film to form the gate insulating film 12'
and a source region forming window 12S.
and a drain region forming window 12D.

(7) Apply the ion implantation method to form the source region 15 and drain region 16 by implanting, for example, boron ions in the case of a P-channel type, or, for example, neighboring ions in the case of an N-channel type, and form the polycrystalline Silicon film 13 and silicon gate 1
4 to be conductive. At this time, charges in the insulating film 12 are released to the semiconductor substrate 11 via the connecting polycrystalline silicon film 13.

Thereafter, an insulating film and metal electrodes are formed using conventional techniques to complete the process.

As can be understood from the above description, the present invention can be implemented with almost no increase in the manufacturing process of a silicon gate MIS field effect semiconductor device, and the only slight increase is that The only step is to remove the thin insulating film formed on the semiconductor substrate, and even if the device has an element that connects the silicon gate to the semiconductor substrate, which has been put into practical use in recent years, the gate insulating film must be processed. Since it is not, it is sufficient to use that process, and in that case, there will be no increase in the process at all.

It is very advantageous in terms of process if the isolation grooves of the insulating film 12 in the above description are formed in line with the scribe lines for forming a so-called one chip, and there is no adverse effect on transistors and the like.
Note that the symbol Q in FIG. 3 indicates one chip.

As can be seen from the above description, according to the present invention, grooves are formed to divide an insulating film formed on a semiconductor substrate into predetermined areas to expose the surface of the semiconductor substrate, and then a polycrystalline silicon film is grown. Since ion implantation is performed after the surface of the semiconductor substrate and the surface of the insulating film are bonded, the charges accumulated in the insulating film due to ion implantation are released to the semiconductor substrate via the polycrystalline silicon film. , accidents of dielectric breakdown of the insulating film are almost eliminated. Further, in carrying out the present invention, there is no or almost no increase in the number of steps compared to the case of manufacturing a normal semiconductor device.

[Brief explanation of the drawing]

Fig. 1 is a side cross-sectional view of a main part of a semiconductor wafer to explain the conventional technology, Fig. 2 is a side cross-sectional view of a main part of a semiconductor wafer to explain the principle of the present invention, and Fig. 3 is a side cross-sectional view of a main part of a semiconductor wafer to explain the principle of the present invention. FIG. 2 is a sectional side view of a main part of a semiconductor wafer for explaining an example. In the figure, 11 is a semiconductor substrate, 12 is an insulating film, 12A is a conductive layer, and 13 is a polycrystalline silicon film for connection.

Claims (1)

[Claims] 1 Forming grooves dividing the insulating film into predetermined areas in an insulating film formed on a semiconductor substrate, exposing the surface of the semiconductor substrate in the grooves, and then connecting the surface of the semiconductor substrate in the grooves with the insulating film. 1. A method of manufacturing a semiconductor device, comprising the steps of forming a polycrystalline semiconductor film connected to a film surface and then performing ion implantation.