JPS6473675A - Manufacture of mis-type semiconductor integrated circuit device - Google Patents

Manufacture of mis-type semiconductor integrated circuit device

Info

Publication number
JPS6473675A
JPS6473675A JP62231603A JP23160387A JPS6473675A JP S6473675 A JPS6473675 A JP S6473675A JP 62231603 A JP62231603 A JP 62231603A JP 23160387 A JP23160387 A JP 23160387A JP S6473675 A JPS6473675 A JP S6473675A
Authority
JP
Japan
Prior art keywords
ion
implantation
conductor layer
implanted
thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62231603A
Other languages
Japanese (ja)
Inventor
Michio Komatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62231603A priority Critical patent/JPS6473675A/en
Publication of JPS6473675A publication Critical patent/JPS6473675A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To realize high integration by a method wherein a thin conductor layer is formed on a whole face of a semiconductor substrate prior to a high-dose ion implantation operation and an ion is implanted through the conductor layer. CONSTITUTION:Prior to an implantation operation of ions of arsenic a thin conductive film 15 is first formed on a whole face. A thickness of the conductive layer 15 must be thin to the extent that an implantation of the ion into a substrate is not suppressed. For this, e.g. about 50-200Angstrom of aluminum is deposited by a sputtering method. After that, the ion of arsenic is implanted at an energy of 70kev and an implantation quantity of about 5X10<15>ions/cm<2>; a source region and a drain region 16a, 16b are formed. During this process, the ion is implanted through the conductive layer 15 and a gate oxide film 13. Because the conductor layer 15 exists, an electric charge generated on its surface during the ion implantation flows out to the outside of a semiconductor substrate through the conductor layer and is not accumulated on the surface of a device; accordingly, insulation of the gate oxide film 13 is not broken down due to to a high electric field. After the ion implantation operation, the conductive layer is removed from the whole face by a wet etching operation or the like.
JP62231603A 1987-09-14 1987-09-14 Manufacture of mis-type semiconductor integrated circuit device Pending JPS6473675A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62231603A JPS6473675A (en) 1987-09-14 1987-09-14 Manufacture of mis-type semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62231603A JPS6473675A (en) 1987-09-14 1987-09-14 Manufacture of mis-type semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS6473675A true JPS6473675A (en) 1989-03-17

Family

ID=16926099

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62231603A Pending JPS6473675A (en) 1987-09-14 1987-09-14 Manufacture of mis-type semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS6473675A (en)

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