JPS5567166A - Preparation of mos type semiconductor device - Google Patents

Preparation of mos type semiconductor device

Info

Publication number
JPS5567166A
JPS5567166A JP13979278A JP13979278A JPS5567166A JP S5567166 A JPS5567166 A JP S5567166A JP 13979278 A JP13979278 A JP 13979278A JP 13979278 A JP13979278 A JP 13979278A JP S5567166 A JPS5567166 A JP S5567166A
Authority
JP
Japan
Prior art keywords
drain
source
matching method
self
preparation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13979278A
Other languages
English (en)
Japanese (ja)
Other versions
JPS628956B2 (enrdf_load_stackoverflow
Inventor
Junji Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13979278A priority Critical patent/JPS5567166A/ja
Publication of JPS5567166A publication Critical patent/JPS5567166A/ja
Publication of JPS628956B2 publication Critical patent/JPS628956B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
JP13979278A 1978-11-15 1978-11-15 Preparation of mos type semiconductor device Granted JPS5567166A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13979278A JPS5567166A (en) 1978-11-15 1978-11-15 Preparation of mos type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13979278A JPS5567166A (en) 1978-11-15 1978-11-15 Preparation of mos type semiconductor device

Publications (2)

Publication Number Publication Date
JPS5567166A true JPS5567166A (en) 1980-05-21
JPS628956B2 JPS628956B2 (enrdf_load_stackoverflow) 1987-02-25

Family

ID=15253524

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13979278A Granted JPS5567166A (en) 1978-11-15 1978-11-15 Preparation of mos type semiconductor device

Country Status (1)

Country Link
JP (1) JPS5567166A (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58118158A (ja) * 1981-12-30 1983-07-14 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 電界効果トランジスタの形成方法
JPS6063967A (ja) * 1984-08-06 1985-04-12 Fujitsu Ltd 絶縁ゲ−ト形電界効果トランジスタの製造方法
US4654680A (en) * 1980-09-24 1987-03-31 Semiconductor Energy Laboratory Co., Ltd. Sidewall gate IGFET
JP2008308728A (ja) * 2007-06-14 2008-12-25 Ulvac Japan Ltd バッキングプレート及びその製造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5265683A (en) * 1975-11-28 1977-05-31 Hitachi Ltd Production of insulated gate type mis semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5265683A (en) * 1975-11-28 1977-05-31 Hitachi Ltd Production of insulated gate type mis semiconductor device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4654680A (en) * 1980-09-24 1987-03-31 Semiconductor Energy Laboratory Co., Ltd. Sidewall gate IGFET
US4717941A (en) * 1980-09-24 1988-01-05 Semiconductor Energy Laboratory Co., Ltd. Sidewall multiple-gate IGFET
US4721988A (en) * 1980-09-24 1988-01-26 Semiconductor Energy Laboratory Co., Ltd. Self-aligned dual-gate igfet assembly
US4729002A (en) * 1980-09-24 1988-03-01 Semiconductor Energy Laboratory Co., Ltd. Self-aligned sidewall gate IGFET
JPS58118158A (ja) * 1981-12-30 1983-07-14 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 電界効果トランジスタの形成方法
JPS6063967A (ja) * 1984-08-06 1985-04-12 Fujitsu Ltd 絶縁ゲ−ト形電界効果トランジスタの製造方法
JP2008308728A (ja) * 2007-06-14 2008-12-25 Ulvac Japan Ltd バッキングプレート及びその製造方法

Also Published As

Publication number Publication date
JPS628956B2 (enrdf_load_stackoverflow) 1987-02-25

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