JPS5559746A - Semiconductor device and its mounting circuit device - Google Patents

Semiconductor device and its mounting circuit device

Info

Publication number
JPS5559746A
JPS5559746A JP13163478A JP13163478A JPS5559746A JP S5559746 A JPS5559746 A JP S5559746A JP 13163478 A JP13163478 A JP 13163478A JP 13163478 A JP13163478 A JP 13163478A JP S5559746 A JPS5559746 A JP S5559746A
Authority
JP
Japan
Prior art keywords
package
electrode
lsi
wiring
wiring substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13163478A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6220701B2 (enrdf_load_stackoverflow
Inventor
Kanji Otsuka
Masao Sekihashi
Tamotsu Usami
Michiaki Furukawa
Fumiyuki Kobayashi
Masakatsu Ishida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13163478A priority Critical patent/JPS5559746A/ja
Publication of JPS5559746A publication Critical patent/JPS5559746A/ja
Publication of JPS6220701B2 publication Critical patent/JPS6220701B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge

Landscapes

  • Wire Bonding (AREA)
JP13163478A 1978-10-27 1978-10-27 Semiconductor device and its mounting circuit device Granted JPS5559746A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13163478A JPS5559746A (en) 1978-10-27 1978-10-27 Semiconductor device and its mounting circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13163478A JPS5559746A (en) 1978-10-27 1978-10-27 Semiconductor device and its mounting circuit device

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP8636285A Division JPS60258932A (ja) 1985-04-24 1985-04-24 半導体装置及びその回路装置
JP29200587A Division JPS63146455A (ja) 1987-11-20 1987-11-20 半導体装置

Publications (2)

Publication Number Publication Date
JPS5559746A true JPS5559746A (en) 1980-05-06
JPS6220701B2 JPS6220701B2 (enrdf_load_stackoverflow) 1987-05-08

Family

ID=15062629

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13163478A Granted JPS5559746A (en) 1978-10-27 1978-10-27 Semiconductor device and its mounting circuit device

Country Status (1)

Country Link
JP (1) JPS5559746A (enrdf_load_stackoverflow)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5745262A (en) * 1980-09-01 1982-03-15 Fujitsu Ltd Sealing and fitting structure of semiconductor device
JPS59151443A (ja) * 1983-02-17 1984-08-29 Fujitsu Ltd 半導体装置
JPS59198739A (ja) * 1983-04-26 1984-11-10 Nec Corp チツプキヤリア
JPH0189752U (enrdf_load_stackoverflow) * 1988-12-08 1989-06-13
US6652290B2 (en) 1999-03-18 2003-11-25 International Business Machines Corporation Connecting devices and method for interconnecting circuit components

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54148377A (en) * 1978-05-15 1979-11-20 Ngk Spark Plug Co Leadless package for attaching semiconductor chip
JPS5521154A (en) * 1978-08-03 1980-02-15 Ngk Insulators Ltd Ceramic package

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54148377A (en) * 1978-05-15 1979-11-20 Ngk Spark Plug Co Leadless package for attaching semiconductor chip
JPS5521154A (en) * 1978-08-03 1980-02-15 Ngk Insulators Ltd Ceramic package

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5745262A (en) * 1980-09-01 1982-03-15 Fujitsu Ltd Sealing and fitting structure of semiconductor device
JPS59151443A (ja) * 1983-02-17 1984-08-29 Fujitsu Ltd 半導体装置
JPS59198739A (ja) * 1983-04-26 1984-11-10 Nec Corp チツプキヤリア
JPH0189752U (enrdf_load_stackoverflow) * 1988-12-08 1989-06-13
US6652290B2 (en) 1999-03-18 2003-11-25 International Business Machines Corporation Connecting devices and method for interconnecting circuit components

Also Published As

Publication number Publication date
JPS6220701B2 (enrdf_load_stackoverflow) 1987-05-08

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