JPS5534398A - Semiconductor memory - Google Patents

Semiconductor memory

Info

Publication number
JPS5534398A
JPS5534398A JP11176979A JP11176979A JPS5534398A JP S5534398 A JPS5534398 A JP S5534398A JP 11176979 A JP11176979 A JP 11176979A JP 11176979 A JP11176979 A JP 11176979A JP S5534398 A JPS5534398 A JP S5534398A
Authority
JP
Japan
Prior art keywords
region
semiconductor memory
word line
fet
regions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11176979A
Other languages
Japanese (ja)
Other versions
JPS603703B2 (en
Inventor
Kiyoo Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP54111769A priority Critical patent/JPS603703B2/en
Publication of JPS5534398A publication Critical patent/JPS5534398A/en
Publication of JPS603703B2 publication Critical patent/JPS603703B2/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device

Abstract

PURPOSE:To obtain a fast and stable LSI memory by composing a gate electrode of FET in a semiconductor memory cell of a word line itself, on a semiconductor memory of column-directional word lines and row-directional data lines. CONSTITUTION:In silicon substrate 600, drain region 410 and source region 400 are provided and drain region 420 is similarly formed adjoining to region 410, thereby forming memory capacity C0. Next, insulating film 200 is bonded on the entire surface and between regions 410 and 400, a channel region as word line W60 is formed. Between regions 420 and 410, channel Cp is formed in film 200. In this way, a gate electrode of FET in the memory cell is composed of word line W60 itself.
JP54111769A 1979-09-03 1979-09-03 semiconductor memory Expired JPS603703B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54111769A JPS603703B2 (en) 1979-09-03 1979-09-03 semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54111769A JPS603703B2 (en) 1979-09-03 1979-09-03 semiconductor memory

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP14805674A Division JPS5539073B2 (en) 1974-12-25 1974-12-25

Publications (2)

Publication Number Publication Date
JPS5534398A true JPS5534398A (en) 1980-03-10
JPS603703B2 JPS603703B2 (en) 1985-01-30

Family

ID=14569701

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54111769A Expired JPS603703B2 (en) 1979-09-03 1979-09-03 semiconductor memory

Country Status (1)

Country Link
JP (1) JPS603703B2 (en)

Also Published As

Publication number Publication date
JPS603703B2 (en) 1985-01-30

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