JPS55158754A - Codec - Google Patents

Codec

Info

Publication number
JPS55158754A
JPS55158754A JP6582979A JP6582979A JPS55158754A JP S55158754 A JPS55158754 A JP S55158754A JP 6582979 A JP6582979 A JP 6582979A JP 6582979 A JP6582979 A JP 6582979A JP S55158754 A JPS55158754 A JP S55158754A
Authority
JP
Japan
Prior art keywords
clock signal
frequency
external clock
external
division ratio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6582979A
Other languages
Japanese (ja)
Other versions
JPS6126255B2 (en
Inventor
Masao Yamazawa
Toshi Ikezawa
Masayuki Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6582979A priority Critical patent/JPS55158754A/en
Publication of JPS55158754A publication Critical patent/JPS55158754A/en
Publication of JPS6126255B2 publication Critical patent/JPS6126255B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Analogue/Digital Conversion (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To secure the general-purpose properties as well as reduce the number of external connection pins, by detecting the frequency to the several types of external clock signals and then dividing the frequency after setting the frequency division ratio in order to produce the constant conversion clock at all times. CONSTITUTION:Counter part 11 detects the frequency of the external clock signal which is applied through input terminal 2 and then normalizes the external clock signal in a period of the synchronous pulse and every N-count. Thus the carry signal is produced to be sent to control logic part 12. Part 12 decides the division ratio for division of the external clock signal and in accordance with the frequency of the external clock signal detected. Then the external clock signal is divided at variable divider part 13 and in accordance with the above division ratio. Thus the constant internal conversion clock signal frequency can be obtained to the several types of external clock signal frequencies. And then the general-purpose properties is obtained by always securing the constant function for both the coding and encoding. At the same time, the number of the external connection pins can be reduced.
JP6582979A 1979-05-28 1979-05-28 Codec Granted JPS55158754A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6582979A JPS55158754A (en) 1979-05-28 1979-05-28 Codec

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6582979A JPS55158754A (en) 1979-05-28 1979-05-28 Codec

Publications (2)

Publication Number Publication Date
JPS55158754A true JPS55158754A (en) 1980-12-10
JPS6126255B2 JPS6126255B2 (en) 1986-06-19

Family

ID=13298296

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6582979A Granted JPS55158754A (en) 1979-05-28 1979-05-28 Codec

Country Status (1)

Country Link
JP (1) JPS55158754A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012023417A (en) * 2010-07-12 2012-02-02 Panasonic Corp Clock reproduction circuit and digital audio reproducer using it
JP2013153409A (en) * 2011-12-28 2013-08-08 Panasonic Corp Clock regeneration circuit and digital audio reproduction apparatus

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01130946U (en) * 1988-03-02 1989-09-06
JPH0642679U (en) * 1992-11-13 1994-06-07 積水化成品工業株式会社 Hanging container

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012023417A (en) * 2010-07-12 2012-02-02 Panasonic Corp Clock reproduction circuit and digital audio reproducer using it
JP2013153409A (en) * 2011-12-28 2013-08-08 Panasonic Corp Clock regeneration circuit and digital audio reproduction apparatus

Also Published As

Publication number Publication date
JPS6126255B2 (en) 1986-06-19

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