JPS57116415A - Reference pulse generator - Google Patents

Reference pulse generator

Info

Publication number
JPS57116415A
JPS57116415A JP238981A JP238981A JPS57116415A JP S57116415 A JPS57116415 A JP S57116415A JP 238981 A JP238981 A JP 238981A JP 238981 A JP238981 A JP 238981A JP S57116415 A JPS57116415 A JP S57116415A
Authority
JP
Japan
Prior art keywords
oscillator
output
period
gate
oscillation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP238981A
Other languages
Japanese (ja)
Inventor
Tadashi Shibuya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meidensha Corp
Meidensha Electric Manufacturing Co Ltd
Original Assignee
Meidensha Corp
Meidensha Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meidensha Corp, Meidensha Electric Manufacturing Co Ltd filed Critical Meidensha Corp
Priority to JP238981A priority Critical patent/JPS57116415A/en
Publication of JPS57116415A publication Critical patent/JPS57116415A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/19—Monitoring patterns of pulse trains

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To improve the relialbility of a reference pulse generator by permitting a stand-off oscillator to oscillate at a frequency a little bit lower than a prescribed momentarily when a master oscillator becomes abnormal, and then to perform independent oscillation at the prescribed period from the point in time. CONSTITUTION:While a master oscillator 1 is normal, a monostable multivibrator 3 generates an output in every period T1, so the output of a delay detecting circuit 4 is held at a level H. Therefore, an NAND gate 8 is opened and the output of the monostable multivibrator 3 is inverted to obtain and output POUT. Further, the output of a synchronizing circuit 5 is inverted by a gate 6 and the synchronism of a stand-by oscillator 2 is acquired. At this time, the frequency and phase of the oscillator 2 are coincident with those of the oscillator 1 by synchronization during a period T1+DELTAT. In this state, if the oscillator 1 becomes abnormal, the output of the circuit varies to a level L. This signal closes the gate 6, and the oscillator 2 enters into independant oscillation. Therefore, the oscillator 2 has the instantaneous period T1+DELTAT when the abnormality occurs, but the independent oscillation has a period T1, so that its output is passed through an NAND gate 9 to obtain an output POUT.
JP238981A 1981-01-10 1981-01-10 Reference pulse generator Pending JPS57116415A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP238981A JPS57116415A (en) 1981-01-10 1981-01-10 Reference pulse generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP238981A JPS57116415A (en) 1981-01-10 1981-01-10 Reference pulse generator

Publications (1)

Publication Number Publication Date
JPS57116415A true JPS57116415A (en) 1982-07-20

Family

ID=11527869

Family Applications (1)

Application Number Title Priority Date Filing Date
JP238981A Pending JPS57116415A (en) 1981-01-10 1981-01-10 Reference pulse generator

Country Status (1)

Country Link
JP (1) JPS57116415A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63245115A (en) * 1987-03-19 1988-10-12 アメリカン　テレフォン　アンド　テレグラフ　カムパニー Apparatus and method for current surge drainage for cmos device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5116852A (en) * 1974-08-01 1976-02-10 Mitsubishi Electric Corp

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5116852A (en) * 1974-08-01 1976-02-10 Mitsubishi Electric Corp

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63245115A (en) * 1987-03-19 1988-10-12 アメリカン　テレフォン　アンド　テレグラフ　カムパニー Apparatus and method for current surge drainage for cmos device

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