JPS5545153A - Synchronizing signal circuit - Google Patents
Synchronizing signal circuitInfo
- Publication number
- JPS5545153A JPS5545153A JP11793978A JP11793978A JPS5545153A JP S5545153 A JPS5545153 A JP S5545153A JP 11793978 A JP11793978 A JP 11793978A JP 11793978 A JP11793978 A JP 11793978A JP S5545153 A JPS5545153 A JP S5545153A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- synchronizing signal
- vertical
- pulses
- equivalent
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Synchronizing For Television (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Abstract
PURPOSE: To obtain accurately the end timing of a vertical synchronous period by counting the number of equivalent pulses right after the vertical synchronizing signal of the composite synchronizing signal of a video signal and then by generating an end signal of a vertical synchronous part at a horizontal synchronizing signal position right after counting.
CONSTITUTION: A composite synchronizing signal, triggering monostable multivibrator 2 with a fixed time constant, is applied via inverter 3 to NAND gate 4 applied with the output of multivibrator 2. As a result, downward pulses are outputted fron gate 4 only in a vertical synchronizing pulse period and NAND gate 6, on receiving the set output of RS FF5 and the composite synchronizing signal through inverter 3, applies equivalent pulses after a vertival synchronous period start to a counter set by a downward pulse through gate 4. Then, counter 11 detects an equivalent pulse end judging from the fixed count number of equivalent pulses after the vertical synchronizing signal and then generates a carry signal, an accurate vertical synchronous period end timing signal, at a horizontal synchronizing signal position right after it. Therefore, the initial point of the data of the PCM signal can be set stably synchronizing with clocks.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11793978A JPS5545153A (en) | 1978-09-27 | 1978-09-27 | Synchronizing signal circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11793978A JPS5545153A (en) | 1978-09-27 | 1978-09-27 | Synchronizing signal circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5545153A true JPS5545153A (en) | 1980-03-29 |
Family
ID=14723952
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11793978A Pending JPS5545153A (en) | 1978-09-27 | 1978-09-27 | Synchronizing signal circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5545153A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55160311A (en) * | 1979-05-30 | 1980-12-13 | Matsushita Electric Ind Co Ltd | Program searching circuit |
JPS5798078U (en) * | 1980-12-08 | 1982-06-16 |
-
1978
- 1978-09-27 JP JP11793978A patent/JPS5545153A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55160311A (en) * | 1979-05-30 | 1980-12-13 | Matsushita Electric Ind Co Ltd | Program searching circuit |
JPS5798078U (en) * | 1980-12-08 | 1982-06-16 |
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