JPS5767321A - Pulse generating circuit - Google Patents

Pulse generating circuit

Info

Publication number
JPS5767321A
JPS5767321A JP55144958A JP14495880A JPS5767321A JP S5767321 A JPS5767321 A JP S5767321A JP 55144958 A JP55144958 A JP 55144958A JP 14495880 A JP14495880 A JP 14495880A JP S5767321 A JPS5767321 A JP S5767321A
Authority
JP
Japan
Prior art keywords
pulse
counter
output
input
generating circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55144958A
Other languages
Japanese (ja)
Inventor
Hiroaki Takemoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP55144958A priority Critical patent/JPS5767321A/en
Publication of JPS5767321A publication Critical patent/JPS5767321A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/04—Shaping pulses by increasing duration; by decreasing duration
    • H03K5/05—Shaping pulses by increasing duration; by decreasing duration by the use of clock signals or other time reference signals

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To change easily an expansion ratio of a pulse width through-out a wide range, by using the first and the second counters to expand the width of an input pulse. CONSTITUTION:When an input pulse is applied to an input terminal 10, a gate 1 is opened, and a clock pulse is inputted from an oscillator 2 to a counter 3. Meanwhile, a flip flop 4 is triggerred by the rise of the input pulse. A gate 5 is opened by the output, and the clock pulse is counted by a counter 7 after frequency division in a 1/n counter. When values of counter 3 and 7 coincide with each other, a comparator 8 detects this coincidence to change the output. Thus, a multivibrator 9 is driven, and the output resets the flip flop 4 as a reset pulse.
JP55144958A 1980-10-15 1980-10-15 Pulse generating circuit Pending JPS5767321A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55144958A JPS5767321A (en) 1980-10-15 1980-10-15 Pulse generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55144958A JPS5767321A (en) 1980-10-15 1980-10-15 Pulse generating circuit

Publications (1)

Publication Number Publication Date
JPS5767321A true JPS5767321A (en) 1982-04-23

Family

ID=15374143

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55144958A Pending JPS5767321A (en) 1980-10-15 1980-10-15 Pulse generating circuit

Country Status (1)

Country Link
JP (1) JPS5767321A (en)

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