JPS55156362A - Complementary mos semiconductor device and manufacture thereof - Google Patents

Complementary mos semiconductor device and manufacture thereof

Info

Publication number
JPS55156362A
JPS55156362A JP6419479A JP6419479A JPS55156362A JP S55156362 A JPS55156362 A JP S55156362A JP 6419479 A JP6419479 A JP 6419479A JP 6419479 A JP6419479 A JP 6419479A JP S55156362 A JPS55156362 A JP S55156362A
Authority
JP
Japan
Prior art keywords
layer
prepared
defectless
cmos
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6419479A
Other languages
Japanese (ja)
Other versions
JPS6146064B2 (en
Inventor
Kazuhiko Yamamoto
Kazutoshi Nagasawa
Masatake Kishino
Hideo Otsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI, CHO LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP6419479A priority Critical patent/JPS55156362A/en
Publication of JPS55156362A publication Critical patent/JPS55156362A/en
Publication of JPS6146064B2 publication Critical patent/JPS6146064B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0927—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising a P-well only in the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To improve CMOS dynamic characteristic by a method wherein a defectless layer is formed in a semiconductor substrate up to the part shallower than the well layer and deeper than the diffused layer and the recombination center (high density microscopic defect) is inside prepared. CONSTITUTION:An n-type Si substrate is heat-treated in O2 at 800 deg.C and in N2 at 1,100 deg.C to make a defectless layer 12 and a recombination central layer 13 with high density microscopic defects inside. Next, a p well layer 14 is prepared by B diffusion and an n channel FET22 and a p<+> contact layer 212 are made as prescrived and also an n layer 11 surface is provided with a p<+> channel FET20 and an n<+> contact layer 211 are prepared. Next, a wiring layer is prepared as described to form CMOS unit. According to said constitution the source and drain are formed in the defectless layer to remarkably lower the interface. Moreover, the electrons injected from the emitter of a parasitic transistor can easily be trapped by the byse layer having a recombination center to prevent the latch-up phenomenon and to gain CMOS of good dynamic characteristic.
JP6419479A 1979-05-24 1979-05-24 Complementary mos semiconductor device and manufacture thereof Granted JPS55156362A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6419479A JPS55156362A (en) 1979-05-24 1979-05-24 Complementary mos semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6419479A JPS55156362A (en) 1979-05-24 1979-05-24 Complementary mos semiconductor device and manufacture thereof

Publications (2)

Publication Number Publication Date
JPS55156362A true JPS55156362A (en) 1980-12-05
JPS6146064B2 JPS6146064B2 (en) 1986-10-11

Family

ID=13251008

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6419479A Granted JPS55156362A (en) 1979-05-24 1979-05-24 Complementary mos semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS55156362A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58143563A (en) * 1982-02-22 1983-08-26 Hitachi Ltd Semiconductor device and its manufacture
JPS6089931A (en) * 1983-10-24 1985-05-20 Matsushita Electronics Corp Manufacture of semiconductor device
US5455437A (en) * 1991-11-20 1995-10-03 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having crystalline defect isolation regions

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58143563A (en) * 1982-02-22 1983-08-26 Hitachi Ltd Semiconductor device and its manufacture
JPH0241175B2 (en) * 1982-02-22 1990-09-14 Hitachi Ltd
JPS6089931A (en) * 1983-10-24 1985-05-20 Matsushita Electronics Corp Manufacture of semiconductor device
US5455437A (en) * 1991-11-20 1995-10-03 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having crystalline defect isolation regions

Also Published As

Publication number Publication date
JPS6146064B2 (en) 1986-10-11

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