JPS55138251A - Method for dielectric isolation of semiconductor element - Google Patents

Method for dielectric isolation of semiconductor element

Info

Publication number
JPS55138251A
JPS55138251A JP4302079A JP4302079A JPS55138251A JP S55138251 A JPS55138251 A JP S55138251A JP 4302079 A JP4302079 A JP 4302079A JP 4302079 A JP4302079 A JP 4302079A JP S55138251 A JPS55138251 A JP S55138251A
Authority
JP
Japan
Prior art keywords
layer
groove
anode
etching
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4302079A
Other languages
Japanese (ja)
Inventor
Akira Sato
Hisao Nakajima
Tokuo Kure
Masao Kawamura
Akira Shintani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4302079A priority Critical patent/JPS55138251A/en
Publication of JPS55138251A publication Critical patent/JPS55138251A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/763—Polycrystalline semiconductor regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To obtain an IC of high density by a method wherein a smooth insulated and isolated layer by the use of anode oxidization of an Al film without using photoetching. CONSTITUTION:After forming an n<+>-buried layer 2 in a p-type Si substrate 1, on which a p-epitaxial layer 3, an SiO2 layer 4 and an Si3N4 layer 5 are laminated, a groove 12 reaching the substrate 1 is provided by the reactive sputtering method while adding to it a photoresist mask 6. Then a streak is formed by etching the layers 3-1 using a liquid of nitric acid fluoride series. Next an SiO2 film 7 is provided in the groove 12 and polycrystalline-Si 8, Al 9 are vacuum-evaporated. An anode oxidized film 10 is formed on the surface of the Al 9 in the groove 12. The Al 9 on the layer 8 is isolated because of the streak and not anode-oxidized. The Al 9 and the Si layer 8 near the groove are removed by etching with the anode-oxidized film 10 as a mask. Then films 10, 9 are removed by etching and the polycrystalline Si layer 11 is epitaxially formed with the layer 8 as a core, then dielectric isolation of planar construction is completed, thus making it possible to form an IC of high density of which the reduction of the active layer is minimized in the horizontal direction.
JP4302079A 1979-04-11 1979-04-11 Method for dielectric isolation of semiconductor element Pending JPS55138251A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4302079A JPS55138251A (en) 1979-04-11 1979-04-11 Method for dielectric isolation of semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4302079A JPS55138251A (en) 1979-04-11 1979-04-11 Method for dielectric isolation of semiconductor element

Publications (1)

Publication Number Publication Date
JPS55138251A true JPS55138251A (en) 1980-10-28

Family

ID=12652275

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4302079A Pending JPS55138251A (en) 1979-04-11 1979-04-11 Method for dielectric isolation of semiconductor element

Country Status (1)

Country Link
JP (1) JPS55138251A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0097789A2 (en) * 1982-06-30 1984-01-11 International Business Machines Corporation Method of filling trenches in semiconductor substrates with silicon

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54590A (en) * 1977-06-03 1979-01-05 Hitachi Ltd Element isolating method

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54590A (en) * 1977-06-03 1979-01-05 Hitachi Ltd Element isolating method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0097789A2 (en) * 1982-06-30 1984-01-11 International Business Machines Corporation Method of filling trenches in semiconductor substrates with silicon

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