JPS5553461A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5553461A
JPS5553461A JP12708078A JP12708078A JPS5553461A JP S5553461 A JPS5553461 A JP S5553461A JP 12708078 A JP12708078 A JP 12708078A JP 12708078 A JP12708078 A JP 12708078A JP S5553461 A JPS5553461 A JP S5553461A
Authority
JP
Japan
Prior art keywords
layer
layers
selfmatching
sio
poly
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12708078A
Other languages
Japanese (ja)
Inventor
Junji Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP12708078A priority Critical patent/JPS5553461A/en
Publication of JPS5553461A publication Critical patent/JPS5553461A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE: To improve integration ability of MOS device by forming ource-drain in poly Si layer by selfmatching in utilizing that diffusion factor is larger in poly Si than monocrystal and layer oxide grows by impurity density in oxidation at lower temperature.
CONSTITUTION: SiO212, selectively formed by gas phase epi multi-crystal layers 13, 13' and monocrystal layer 14 are formed on P-type Si 11 by selfmatching. Upperside of the layer 14 is coated with SiO28 and As is diffused into the layers 13, 13' so that As penerate from the border with layer 14 to form the layers 15, 15'. The film 8 is removed and oxidied at lower temperature and then SiO2 layer 19 grows by selfmatching on the layer 14 thinly and on the layers 13, 13', 15, 15' thickly. The layer 19 is slightly etched to expose the layer 14 and a gate film oxide is formed and B ion is injected into the layer 14 to control the potential value. Finally poly Si gate electrode 17 is formed. The electrode 17 may be stacked on source-drain electric conductive layers 13, 13'.
COPYRIGHT: (C)1980,JPO&Japio
JP12708078A 1978-10-16 1978-10-16 Manufacture of semiconductor device Pending JPS5553461A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12708078A JPS5553461A (en) 1978-10-16 1978-10-16 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12708078A JPS5553461A (en) 1978-10-16 1978-10-16 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5553461A true JPS5553461A (en) 1980-04-18

Family

ID=14951069

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12708078A Pending JPS5553461A (en) 1978-10-16 1978-10-16 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5553461A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4743843A (en) * 1984-08-31 1988-05-10 Mitsubishi Denki Kabushiki Kaisha Display signal generator device
US5043778A (en) * 1986-08-11 1991-08-27 Texas Instruments Incorporated Oxide-isolated source/drain transistor
US5146291A (en) * 1988-08-31 1992-09-08 Mitsubishi Denki Kabushiki Kaisha MIS device having lightly doped drain structure
US5217913A (en) * 1988-08-31 1993-06-08 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing an MIS device having lightly doped drain structure and conductive sidewall spacers
US5506435A (en) * 1992-06-20 1996-04-09 Sony Corporation Static ram having an active area with a tapered bottom surface

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4743843A (en) * 1984-08-31 1988-05-10 Mitsubishi Denki Kabushiki Kaisha Display signal generator device
US5043778A (en) * 1986-08-11 1991-08-27 Texas Instruments Incorporated Oxide-isolated source/drain transistor
US5146291A (en) * 1988-08-31 1992-09-08 Mitsubishi Denki Kabushiki Kaisha MIS device having lightly doped drain structure
US5217913A (en) * 1988-08-31 1993-06-08 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing an MIS device having lightly doped drain structure and conductive sidewall spacers
US5506435A (en) * 1992-06-20 1996-04-09 Sony Corporation Static ram having an active area with a tapered bottom surface

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