JPS54162978A - Manufacture of semicinductor device - Google Patents

Manufacture of semicinductor device

Info

Publication number
JPS54162978A
JPS54162978A JP7152378A JP7152378A JPS54162978A JP S54162978 A JPS54162978 A JP S54162978A JP 7152378 A JP7152378 A JP 7152378A JP 7152378 A JP7152378 A JP 7152378A JP S54162978 A JPS54162978 A JP S54162978A
Authority
JP
Japan
Prior art keywords
layer
mask
substrate
sio
buried layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7152378A
Other languages
Japanese (ja)
Other versions
JPS5710573B2 (en
Inventor
Junichi Ochiai
Hironori Kitabayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP7152378A priority Critical patent/JPS54162978A/en
Publication of JPS54162978A publication Critical patent/JPS54162978A/en
Publication of JPS5710573B2 publication Critical patent/JPS5710573B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To minimize the diffusion of the N+-buried layer bt reducing the photo process down to two times with thus reduction of the working time and then providing the isolated oxide film in a short time and at a low temperature via the pressure oxidation, and thus enhancing the characteristics of the semiconductor element.
CONSTITUTION: Poly Si1c is formed to P-type Si substrate 1, and Si3N4 mask 6 is formed to inject the N-type impurity ion into layer 1c. After this, the oxidation is applied to form oxide layer 2b and N+-type buried layer 2. Mask 6 is then removed and the P-type impurity ion is injected to layer 1c to then form SiO23a and P-layer 3. Then layer 2b and 3a are removed with formation of epitaxial layer 4, and then film 4c and the surface of layer 4 are removed by etching via distortion preventing SiO24c and Si3N4 mask 6. Then the pressure oxidation is given to form desired oxide film 5 in a short time and at a low temperature. In such way, the floating diffusion can be reduced greatly and with thinned layer 4 obtained. Furthermore, the buried layer is covered with SiO2 when P-layer 1c is formed to secure a high density, and the density of the substrate can be lowered to thus reduce the capacity between the buried layer and the substrate.
COPYRIGHT: (C)1979,JPO&Japio
JP7152378A 1978-06-15 1978-06-15 Manufacture of semicinductor device Granted JPS54162978A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7152378A JPS54162978A (en) 1978-06-15 1978-06-15 Manufacture of semicinductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7152378A JPS54162978A (en) 1978-06-15 1978-06-15 Manufacture of semicinductor device

Publications (2)

Publication Number Publication Date
JPS54162978A true JPS54162978A (en) 1979-12-25
JPS5710573B2 JPS5710573B2 (en) 1982-02-26

Family

ID=13463162

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7152378A Granted JPS54162978A (en) 1978-06-15 1978-06-15 Manufacture of semicinductor device

Country Status (1)

Country Link
JP (1) JPS54162978A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6116547A (en) * 1984-05-09 1986-01-24 テキサス　インスツルメンツ　インコ−ポレイテツド Method of producing mos transistor

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01150275U (en) * 1988-04-08 1989-10-17
JPH01150276U (en) * 1988-04-08 1989-10-17

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6116547A (en) * 1984-05-09 1986-01-24 テキサス　インスツルメンツ　インコ−ポレイテツド Method of producing mos transistor

Also Published As

Publication number Publication date
JPS5710573B2 (en) 1982-02-26

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