JPS5562748A - Method of fabricating semiconductor device - Google Patents

Method of fabricating semiconductor device

Info

Publication number
JPS5562748A
JPS5562748A JP13544478A JP13544478A JPS5562748A JP S5562748 A JPS5562748 A JP S5562748A JP 13544478 A JP13544478 A JP 13544478A JP 13544478 A JP13544478 A JP 13544478A JP S5562748 A JPS5562748 A JP S5562748A
Authority
JP
Japan
Prior art keywords
region
buried
pattern
film
entire surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13544478A
Other languages
Japanese (ja)
Inventor
Yutaka Tomita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP13544478A priority Critical patent/JPS5562748A/en
Publication of JPS5562748A publication Critical patent/JPS5562748A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To eliminate contact of two buried regions formed on a semiconductor substrate for a semiconductor device by providing an oxide film disposed on the substrate at both sides of the buried regions, polycrystallizing only the surface of the oxide film when growing an epitaxial layer on the entire surface thereof, and forming a separate region therewith as standard.
CONSTITUTION: An n+-type buried region 2 is diffused on a p-type silicon substrate 1, a SiO2 film 3 is coated on the entire surface thereof in such a manner that the film 3 is retained only in the region 12 used to position with the separate region forming after the buried region 2, and the others are all removed therefrom. Then, the entire surface is grown with an n-type layer 4 in epitaxial grown, and polycrystalline layer 14 is produced on the retained film 3. Thus, the pattern 13 of the region 2 allows to be accurately coincident to the pattern 15 on the polycrystalline layer 14 corresponding thereto, and separately diffused aligning pattern 17 is positioned onto the buried aligning pattern 16 thus produced. Thus, the buried region may not contact with the separate region to occur no improper dielectric strength thereat.
COPYRIGHT: (C)1980,JPO&Japio
JP13544478A 1978-11-02 1978-11-02 Method of fabricating semiconductor device Pending JPS5562748A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13544478A JPS5562748A (en) 1978-11-02 1978-11-02 Method of fabricating semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13544478A JPS5562748A (en) 1978-11-02 1978-11-02 Method of fabricating semiconductor device

Publications (1)

Publication Number Publication Date
JPS5562748A true JPS5562748A (en) 1980-05-12

Family

ID=15151854

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13544478A Pending JPS5562748A (en) 1978-11-02 1978-11-02 Method of fabricating semiconductor device

Country Status (1)

Country Link
JP (1) JPS5562748A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5548455A (en) * 1979-09-08 1980-04-07 Kawasaki Steel Corp Control method for teeming flow of continuous pig

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5548455A (en) * 1979-09-08 1980-04-07 Kawasaki Steel Corp Control method for teeming flow of continuous pig

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