JPS54158887A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS54158887A
JPS54158887A JP6800178A JP6800178A JPS54158887A JP S54158887 A JPS54158887 A JP S54158887A JP 6800178 A JP6800178 A JP 6800178A JP 6800178 A JP6800178 A JP 6800178A JP S54158887 A JPS54158887 A JP S54158887A
Authority
JP
Japan
Prior art keywords
layer
type
film
collector
regions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6800178A
Other languages
Japanese (ja)
Other versions
JPS5854502B2 (en
Inventor
Tadashi Hirao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP6800178A priority Critical patent/JPS5854502B2/en
Publication of JPS54158887A publication Critical patent/JPS54158887A/en
Publication of JPS5854502B2 publication Critical patent/JPS5854502B2/en
Expired legal-status Critical Current

Links

Abstract

PURPOSE: To decrease collector resistance taking advantage of an oxidized-film separating method by previously implanting ions for the compensation of the quantity of impurities segregating during selective oxidation with low energy into an epitaxial layer on a collector-buried region.
CONSTITUTION: In P-type Si substrate 1, N+-type collector-buried regions 2 and 3 are formed by diffusion and on the entire surface including those, N-type layer 5 is grown; a lamination mask of SiO2 film 6 and Si3N4 film 7 with openings (a) and (b) is provided for etching, thereby forming an concave part inside of layer 5. Then, entire surface is covered with resist film 23 except the center part of opening (b), channel-production preventive P-type region 9 is formed reaching substrate 1 through ion injection, and resist 23 is removed. On the surface of layer 5 exposed on the bottom part of each opening, P-type regions 24 to 26 for compensating the segregation from layer 5 at the time of selective oxidation are formed by using a small quantity of ions 1/5 to 1/20 time the previous injection quantity. Next, selective oxidization is carried out to fill openings over regions 24 to 26 with SiO2 films 11 to 13.
COPYRIGHT: (C)1979,JPO&Japio
JP6800178A 1978-06-05 1978-06-05 Manufacturing method of semiconductor device Expired JPS5854502B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6800178A JPS5854502B2 (en) 1978-06-05 1978-06-05 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6800178A JPS5854502B2 (en) 1978-06-05 1978-06-05 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JPS54158887A true JPS54158887A (en) 1979-12-15
JPS5854502B2 JPS5854502B2 (en) 1983-12-05

Family

ID=13361203

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6800178A Expired JPS5854502B2 (en) 1978-06-05 1978-06-05 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5854502B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57197833A (en) * 1981-05-29 1982-12-04 Nec Corp Semiconductor device

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59172302U (en) * 1983-04-30 1984-11-17 吉中興業株式会社 Tape measure that can measure angles
JPS6021903U (en) * 1983-07-21 1985-02-15 外山　登 folding tape measure
JPS6136502U (en) * 1984-08-09 1986-03-06 利郎 温品 three-sided shaku

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57197833A (en) * 1981-05-29 1982-12-04 Nec Corp Semiconductor device

Also Published As

Publication number Publication date
JPS5854502B2 (en) 1983-12-05

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