JPS55128850A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS55128850A
JPS55128850A JP3547879A JP3547879A JPS55128850A JP S55128850 A JPS55128850 A JP S55128850A JP 3547879 A JP3547879 A JP 3547879A JP 3547879 A JP3547879 A JP 3547879A JP S55128850 A JPS55128850 A JP S55128850A
Authority
JP
Japan
Prior art keywords
active region
base
chip
layer
particles
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3547879A
Other languages
Japanese (ja)
Other versions
JPS627700B2 (en
Inventor
Takehisa Nitta
Katsumi Ogiue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3547879A priority Critical patent/JPS55128850A/en
Publication of JPS55128850A publication Critical patent/JPS55128850A/en
Publication of JPS627700B2 publication Critical patent/JPS627700B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8592Applying permanent coating, e.g. protective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE: To prevent an erroneous operation of a semiconductor device owing to alpha rays in an active region by coating an alpha ray shield layer made of high purity material particles such as silicon or quartz dissolved with a binder on the surface of the active region of a semiconductor chip.
CONSTITUTION: A recess is formed at the center on the surface of a ceramic insulating base 10, and an adhesive layer 13 made of An foil or the like is formed on the bottom surface of the base 10. A semiconductor chip 14 having an active region including a memory or the like feasible to erroneously operate owing to alpha rays irradiated from a ceramic is secured onto the surface of the layer 13, and a number of electrodes formed on the chip 14 are connected to corresponding lead wires 2, respectively using bonding wires 15, respectively. An alpha ray shield layer 16 containing high purity silicon particles in a spin-on-glass is coated on the surface of the active region of the chip 14, and polymide resin may be contained in addition to the glass, and quartz particles may be contained instead of the silicon particles. Thereafter, a ceramic cap 17 having a recess 17a on the lower surface is coated on the base 10 and secured to the base 10 using a low melting point glass layer 18.
COPYRIGHT: (C)1980,JPO&Japio
JP3547879A 1979-03-28 1979-03-28 Semiconductor device Granted JPS55128850A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3547879A JPS55128850A (en) 1979-03-28 1979-03-28 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3547879A JPS55128850A (en) 1979-03-28 1979-03-28 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS55128850A true JPS55128850A (en) 1980-10-06
JPS627700B2 JPS627700B2 (en) 1987-02-18

Family

ID=12442865

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3547879A Granted JPS55128850A (en) 1979-03-28 1979-03-28 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS55128850A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55140253A (en) * 1979-04-18 1980-11-01 Fujitsu Ltd Semiconductor device
JPS57195151A (en) * 1981-05-27 1982-11-30 Denki Kagaku Kogyo Kk Low-radioactive resin composition

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55140253A (en) * 1979-04-18 1980-11-01 Fujitsu Ltd Semiconductor device
JPS57195151A (en) * 1981-05-27 1982-11-30 Denki Kagaku Kogyo Kk Low-radioactive resin composition

Also Published As

Publication number Publication date
JPS627700B2 (en) 1987-02-18

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