JPS5455338A - Microprogram controller - Google Patents

Microprogram controller

Info

Publication number
JPS5455338A
JPS5455338A JP12325177A JP12325177A JPS5455338A JP S5455338 A JPS5455338 A JP S5455338A JP 12325177 A JP12325177 A JP 12325177A JP 12325177 A JP12325177 A JP 12325177A JP S5455338 A JPS5455338 A JP S5455338A
Authority
JP
Japan
Prior art keywords
controller
instruction
address
register
microprogram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12325177A
Other languages
Japanese (ja)
Other versions
JPS6029128B2 (en
Inventor
Hiroyuki Izumisawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP52123251A priority Critical patent/JPS6029128B2/en
Publication of JPS5455338A publication Critical patent/JPS5455338A/en
Publication of JPS6029128B2 publication Critical patent/JPS6029128B2/en
Expired legal-status Critical Current

Links

Abstract

PURPOSE: To prevent programs from becoming uncontrolled by detecting a fault of branch operation in its early stage by the method, which discriminates whether or not the branch destination of a microprogram reaches its correct address within a certain time, provided to a controller.
CONSTITUTION: The controller which reads out and executes microprograms in control memory unit 1 sequentially is provided with microprogram control part 4 determining addresses in controller 1 and micro-instruction register 2 holding instructions read out from controller 1. In addition, present address register 5 is provided which holds the program address equivalent to an instruction under execution at that time, and microprogram execution part 3 is also provided which executes instructions in register 5. Further, this controller is also equipped with correct-address register 6 which holds a correct branch-destination address by the instruction of an instruction, and coincidence circuit 7 which detects the coincidence between registers 5 and 6. Then, FF8 which detects an error detection signal by receiving the instruction and the output of circuit 7, and error detection circuit 9 are provided
COPYRIGHT: (C)1979,JPO&Japio
JP52123251A 1977-10-13 1977-10-13 microprogram controller Expired JPS6029128B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52123251A JPS6029128B2 (en) 1977-10-13 1977-10-13 microprogram controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52123251A JPS6029128B2 (en) 1977-10-13 1977-10-13 microprogram controller

Publications (2)

Publication Number Publication Date
JPS5455338A true JPS5455338A (en) 1979-05-02
JPS6029128B2 JPS6029128B2 (en) 1985-07-09

Family

ID=14855935

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52123251A Expired JPS6029128B2 (en) 1977-10-13 1977-10-13 microprogram controller

Country Status (1)

Country Link
JP (1) JPS6029128B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102531994B1 (en) 2017-12-29 2023-05-15 삼성전자주식회사 Apparatus and method for measuring biological components

Also Published As

Publication number Publication date
JPS6029128B2 (en) 1985-07-09

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