JPS5679340A - Data processing device of microprogram control system - Google Patents

Data processing device of microprogram control system

Info

Publication number
JPS5679340A
JPS5679340A JP15540779A JP15540779A JPS5679340A JP S5679340 A JPS5679340 A JP S5679340A JP 15540779 A JP15540779 A JP 15540779A JP 15540779 A JP15540779 A JP 15540779A JP S5679340 A JPS5679340 A JP S5679340A
Authority
JP
Japan
Prior art keywords
instruction
specific
processor
rom12
micro
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15540779A
Other languages
Japanese (ja)
Inventor
Kazuyuki Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15540779A priority Critical patent/JPS5679340A/en
Publication of JPS5679340A publication Critical patent/JPS5679340A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To easily execute the debug of the microprogram and the operation confirmation of the 1-chip CPU, by the program level, by controlling the microprocessor by the specific micro-instruction from the micro-instruction generation means.
CONSTITUTION: This device is equipped with the integrated 1-chip micro (μ) processor 11 and the ROM12 which has stored various μ programs containing the specific test program. Also, the specific instruction for designating the branch to the specific program is generated from the μ instruction generation part 18, and the specific address is set to the address register 14. The contents of this register 14 are compared with the address submitted to the ROM12 from the processor 11 by the comparator 15, the read-out output of the ROM12 is inhibited by the coincidence output from this circuit 15, the μ instruction is sent out to the processor 11 from the generation part 18 by the D type FF17, it is made to branch to the specific test program designated by the μ instruction when coincidence by the circuit 15 has been detected, and the operation confirmation of the processor 11 is executed easily by the program level.
COPYRIGHT: (C)1981,JPO&Japio
JP15540779A 1979-11-30 1979-11-30 Data processing device of microprogram control system Pending JPS5679340A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15540779A JPS5679340A (en) 1979-11-30 1979-11-30 Data processing device of microprogram control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15540779A JPS5679340A (en) 1979-11-30 1979-11-30 Data processing device of microprogram control system

Publications (1)

Publication Number Publication Date
JPS5679340A true JPS5679340A (en) 1981-06-29

Family

ID=15605297

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15540779A Pending JPS5679340A (en) 1979-11-30 1979-11-30 Data processing device of microprogram control system

Country Status (1)

Country Link
JP (1) JPS5679340A (en)

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