JPS54134946A - Monitor system for program frequency - Google Patents

Monitor system for program frequency

Info

Publication number
JPS54134946A
JPS54134946A JP4297978A JP4297978A JPS54134946A JP S54134946 A JPS54134946 A JP S54134946A JP 4297978 A JP4297978 A JP 4297978A JP 4297978 A JP4297978 A JP 4297978A JP S54134946 A JPS54134946 A JP S54134946A
Authority
JP
Japan
Prior art keywords
memory unit
program frequency
instruction
program
monitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4297978A
Other languages
Japanese (ja)
Other versions
JPS5835293B2 (en
Inventor
Yukichi Ikuta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP53042979A priority Critical patent/JPS5835293B2/en
Publication of JPS54134946A publication Critical patent/JPS54134946A/en
Publication of JPS5835293B2 publication Critical patent/JPS5835293B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To make it possible to grasp program characteristics accurately in a short time, by obtaining automatically a program frequency not by the eye by providing a program frequency memory unit stored with the run distribution of the instruction address of a central processor.
CONSTITUTION: In the data processor which includes main memory unit 1 stored with instructions and data and central processor 2 controlling the execution of an instruction, program frequency memory unit 9 is stored with the run distribution of the instruction address of central processor 2. Then, monitor head address register 6 holds the head address of an instruction address monitor area, and monitor register 7 assigns the size of the monitor area. In this constitution, the program frequency can be obtained automatically by increasing the corresponding memory contents in the program frequency memory unit at every time when an instruction executed in the assigned monitor area of main memory unit 1.
COPYRIGHT: (C)1979,JPO&Japio
JP53042979A 1978-04-12 1978-04-12 Program frequency monitoring method Expired JPS5835293B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53042979A JPS5835293B2 (en) 1978-04-12 1978-04-12 Program frequency monitoring method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53042979A JPS5835293B2 (en) 1978-04-12 1978-04-12 Program frequency monitoring method

Publications (2)

Publication Number Publication Date
JPS54134946A true JPS54134946A (en) 1979-10-19
JPS5835293B2 JPS5835293B2 (en) 1983-08-02

Family

ID=12651147

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53042979A Expired JPS5835293B2 (en) 1978-04-12 1978-04-12 Program frequency monitoring method

Country Status (1)

Country Link
JP (1) JPS5835293B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5953955A (en) * 1982-09-20 1984-03-28 Fujitsu Ltd Performance measuring system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5953955A (en) * 1982-09-20 1984-03-28 Fujitsu Ltd Performance measuring system
JPH0231420B2 (en) * 1982-09-20 1990-07-13 Fujitsu Ltd

Also Published As

Publication number Publication date
JPS5835293B2 (en) 1983-08-02

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