JPS5668865A - Instruction control system - Google Patents

Instruction control system

Info

Publication number
JPS5668865A
JPS5668865A JP14525979A JP14525979A JPS5668865A JP S5668865 A JPS5668865 A JP S5668865A JP 14525979 A JP14525979 A JP 14525979A JP 14525979 A JP14525979 A JP 14525979A JP S5668865 A JPS5668865 A JP S5668865A
Authority
JP
Japan
Prior art keywords
register
vector
elements
contents
operations
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14525979A
Other languages
Japanese (ja)
Other versions
JPS6022787B2 (en
Inventor
Hiroshi Tamura
Keiichiro Uchida
Fumio Isobe
Tetsuo Okamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54145259A priority Critical patent/JPS6022787B2/en
Publication of JPS5668865A publication Critical patent/JPS5668865A/en
Publication of JPS6022787B2 publication Critical patent/JPS6022787B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Complex Calculations (AREA)

Abstract

PURPOSE:To facilitate program generation and execute the vector operation efficiently, by advancing the control to the next operation when contents of the vector length register are 0 and operation data does not exist in the vector register. CONSTITUTION:Processing device 1 connected to main storage device 2 is provided with N-number vector registers 3 of M-number elements, vector length register 13 which indicates the length of data storing elements of registers 3, and instruction control part 7. Further, 0 detecting circuit 15 is provided which detects that contents of register 13 are 0. Data are taken out successively from respective elements of designated register 3 by designating register 3 as an operand, and operations are executed by the number of elements designated by register 13. If it is detected that contents of register 13 are 0 by circuit 15 before execution of these operations, these operations are not executed to advance the control to the next operation, thereby, facilitating generation of programs.
JP54145259A 1979-11-09 1979-11-09 Command control method Expired JPS6022787B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54145259A JPS6022787B2 (en) 1979-11-09 1979-11-09 Command control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54145259A JPS6022787B2 (en) 1979-11-09 1979-11-09 Command control method

Publications (2)

Publication Number Publication Date
JPS5668865A true JPS5668865A (en) 1981-06-09
JPS6022787B2 JPS6022787B2 (en) 1985-06-04

Family

ID=15380989

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54145259A Expired JPS6022787B2 (en) 1979-11-09 1979-11-09 Command control method

Country Status (1)

Country Link
JP (1) JPS6022787B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6223282B1 (en) 1997-12-29 2001-04-24 Samsung Electronics Co., Ltd. Circuit for controlling execution of loop in digital signal processing chip

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
COMMUNICATIONS OF THE ACM=1978 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6223282B1 (en) 1997-12-29 2001-04-24 Samsung Electronics Co., Ltd. Circuit for controlling execution of loop in digital signal processing chip

Also Published As

Publication number Publication date
JPS6022787B2 (en) 1985-06-04

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