JPS544067A - Electrode forming method of semiconductor device - Google Patents

Electrode forming method of semiconductor device

Info

Publication number
JPS544067A
JPS544067A JP6891977A JP6891977A JPS544067A JP S544067 A JPS544067 A JP S544067A JP 6891977 A JP6891977 A JP 6891977A JP 6891977 A JP6891977 A JP 6891977A JP S544067 A JPS544067 A JP S544067A
Authority
JP
Japan
Prior art keywords
semiconductor device
forming method
electrode forming
tint
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6891977A
Other languages
Japanese (ja)
Inventor
Mikio Hirano
Hisao Nozawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6891977A priority Critical patent/JPS544067A/en
Publication of JPS544067A publication Critical patent/JPS544067A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Landscapes

  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE: To avoid damage to protective film in bonding, by coating solder consisting of tint and lead substantially on the surface of a copper bump with replacement plating method.
COPYRIGHT: (C)1979,JPO&Japio
JP6891977A 1977-06-13 1977-06-13 Electrode forming method of semiconductor device Pending JPS544067A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6891977A JPS544067A (en) 1977-06-13 1977-06-13 Electrode forming method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6891977A JPS544067A (en) 1977-06-13 1977-06-13 Electrode forming method of semiconductor device

Publications (1)

Publication Number Publication Date
JPS544067A true JPS544067A (en) 1979-01-12

Family

ID=13387533

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6891977A Pending JPS544067A (en) 1977-06-13 1977-06-13 Electrode forming method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS544067A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55123844A (en) * 1979-03-17 1980-09-24 Nichirin Gomme Kogyo Kk Winding method of hose braiding thread

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55123844A (en) * 1979-03-17 1980-09-24 Nichirin Gomme Kogyo Kk Winding method of hose braiding thread

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