JPS5433636A - Write-in method of non-volatile semiconductor memory - Google Patents

Write-in method of non-volatile semiconductor memory

Info

Publication number
JPS5433636A
JPS5433636A JP7925378A JP7925378A JPS5433636A JP S5433636 A JPS5433636 A JP S5433636A JP 7925378 A JP7925378 A JP 7925378A JP 7925378 A JP7925378 A JP 7925378A JP S5433636 A JPS5433636 A JP S5433636A
Authority
JP
Japan
Prior art keywords
write
semiconductor memory
volatile semiconductor
rewriting
erase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7925378A
Other languages
Japanese (ja)
Other versions
JPS5634959B2 (en
Inventor
Yutaka Hayashi
Kiyoko Nagai
Yasuo Tarui
Fumimaru Okamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP7925378A priority Critical patent/JPS5433636A/en
Publication of JPS5433636A publication Critical patent/JPS5433636A/en
Publication of JPS5634959B2 publication Critical patent/JPS5634959B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors

Abstract

PURPOSE:To perform the write-in, erase, and rewriting of memory information electrically and easily, by making lower the write-in voltage through the formation of the constitution the same as the base open condition of a junction transistor.
JP7925378A 1978-07-01 1978-07-01 Write-in method of non-volatile semiconductor memory Granted JPS5433636A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7925378A JPS5433636A (en) 1978-07-01 1978-07-01 Write-in method of non-volatile semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7925378A JPS5433636A (en) 1978-07-01 1978-07-01 Write-in method of non-volatile semiconductor memory

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2805073A Division JPS5626988B2 (en) 1973-03-12 1973-03-12

Publications (2)

Publication Number Publication Date
JPS5433636A true JPS5433636A (en) 1979-03-12
JPS5634959B2 JPS5634959B2 (en) 1981-08-13

Family

ID=13684682

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7925378A Granted JPS5433636A (en) 1978-07-01 1978-07-01 Write-in method of non-volatile semiconductor memory

Country Status (1)

Country Link
JP (1) JPS5433636A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4939558A (en) * 1985-09-27 1990-07-03 Texas Instruments Incorporated EEPROM memory cell and driving circuitry
US5300803A (en) * 1992-12-14 1994-04-05 Texas Instruments Incorporated Source side injection non-volatile memory cell

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6013017U (en) * 1983-07-07 1985-01-29 株式会社　協和 bag

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4840387U (en) * 1971-09-10 1973-05-22

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4840387U (en) * 1971-09-10 1973-05-22

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4939558A (en) * 1985-09-27 1990-07-03 Texas Instruments Incorporated EEPROM memory cell and driving circuitry
US5300803A (en) * 1992-12-14 1994-04-05 Texas Instruments Incorporated Source side injection non-volatile memory cell

Also Published As

Publication number Publication date
JPS5634959B2 (en) 1981-08-13

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