JPS54161270A - Lead frame for integrated-circuit device - Google Patents

Lead frame for integrated-circuit device

Info

Publication number
JPS54161270A
JPS54161270A JP7007878A JP7007878A JPS54161270A JP S54161270 A JPS54161270 A JP S54161270A JP 7007878 A JP7007878 A JP 7007878A JP 7007878 A JP7007878 A JP 7007878A JP S54161270 A JPS54161270 A JP S54161270A
Authority
JP
Japan
Prior art keywords
base ribbon
substrates
lead frame
ribbon
gold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7007878A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6227544B2 (enExample
Inventor
Yoshihiko Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7007878A priority Critical patent/JPS54161270A/ja
Publication of JPS54161270A publication Critical patent/JPS54161270A/ja
Publication of JPS6227544B2 publication Critical patent/JPS6227544B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • H10W72/552Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP7007878A 1978-06-09 1978-06-09 Lead frame for integrated-circuit device Granted JPS54161270A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7007878A JPS54161270A (en) 1978-06-09 1978-06-09 Lead frame for integrated-circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7007878A JPS54161270A (en) 1978-06-09 1978-06-09 Lead frame for integrated-circuit device

Publications (2)

Publication Number Publication Date
JPS54161270A true JPS54161270A (en) 1979-12-20
JPS6227544B2 JPS6227544B2 (enExample) 1987-06-15

Family

ID=13421138

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7007878A Granted JPS54161270A (en) 1978-06-09 1978-06-09 Lead frame for integrated-circuit device

Country Status (1)

Country Link
JP (1) JPS54161270A (enExample)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58178544A (ja) * 1982-04-12 1983-10-19 Matsushita Electronics Corp リ−ドフレ−ム
JPS58209146A (ja) * 1982-05-31 1983-12-06 Nec Corp 半導体装置
JPS60141125U (ja) * 1984-02-27 1985-09-18 エルメック株式会社 電子部品装置
JPS63311748A (ja) * 1987-06-12 1988-12-20 Matsushita Electronics Corp 樹脂封止型マルチチップパッケ−ジ
JPH02148758A (ja) * 1988-11-29 1990-06-07 Matsushita Electron Corp 半導体装置用リードフレーム
US5084753A (en) * 1989-01-23 1992-01-28 Analog Devices, Inc. Packaging for multiple chips on a single leadframe
JPH04364066A (ja) * 1991-06-11 1992-12-16 Mitsui High Tec Inc リードフレームおよびこれを用いた半導体装置
JP2002223828A (ja) * 2001-02-05 2002-08-13 Eiji Hiraiwa 折り畳み傘

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4989157A (enExample) * 1972-12-29 1974-08-26
JPS5174758U (enExample) * 1974-12-06 1976-06-11
JPS5245056A (en) * 1976-09-27 1977-04-08 Gen Corp Integrated circuit and method of producing same
JPS534868U (enExample) * 1976-06-29 1978-01-17
JPS538572U (enExample) * 1976-07-07 1978-01-25

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4989157A (enExample) * 1972-12-29 1974-08-26
JPS5174758U (enExample) * 1974-12-06 1976-06-11
JPS534868U (enExample) * 1976-06-29 1978-01-17
JPS538572U (enExample) * 1976-07-07 1978-01-25
JPS5245056A (en) * 1976-09-27 1977-04-08 Gen Corp Integrated circuit and method of producing same

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58178544A (ja) * 1982-04-12 1983-10-19 Matsushita Electronics Corp リ−ドフレ−ム
JPS58209146A (ja) * 1982-05-31 1983-12-06 Nec Corp 半導体装置
JPS60141125U (ja) * 1984-02-27 1985-09-18 エルメック株式会社 電子部品装置
JPS63311748A (ja) * 1987-06-12 1988-12-20 Matsushita Electronics Corp 樹脂封止型マルチチップパッケ−ジ
JPH02148758A (ja) * 1988-11-29 1990-06-07 Matsushita Electron Corp 半導体装置用リードフレーム
US5084753A (en) * 1989-01-23 1992-01-28 Analog Devices, Inc. Packaging for multiple chips on a single leadframe
JPH04364066A (ja) * 1991-06-11 1992-12-16 Mitsui High Tec Inc リードフレームおよびこれを用いた半導体装置
JP2002223828A (ja) * 2001-02-05 2002-08-13 Eiji Hiraiwa 折り畳み傘

Also Published As

Publication number Publication date
JPS6227544B2 (enExample) 1987-06-15

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