JPS54157080A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS54157080A
JPS54157080A JP6619178A JP6619178A JPS54157080A JP S54157080 A JPS54157080 A JP S54157080A JP 6619178 A JP6619178 A JP 6619178A JP 6619178 A JP6619178 A JP 6619178A JP S54157080 A JPS54157080 A JP S54157080A
Authority
JP
Japan
Prior art keywords
connection wire
protrusions
leads
constitution
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6619178A
Other languages
English (en)
Inventor
Chikanari Takayanagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP6619178A priority Critical patent/JPS54157080A/ja
Publication of JPS54157080A publication Critical patent/JPS54157080A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Wire Bonding (AREA)
JP6619178A 1978-05-31 1978-05-31 Semiconductor device Pending JPS54157080A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6619178A JPS54157080A (en) 1978-05-31 1978-05-31 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6619178A JPS54157080A (en) 1978-05-31 1978-05-31 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS54157080A true JPS54157080A (en) 1979-12-11

Family

ID=13308698

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6619178A Pending JPS54157080A (en) 1978-05-31 1978-05-31 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS54157080A (ja)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5295968A (en) * 1976-02-09 1977-08-12 Hitachi Ltd Diffusion furnace with automatic shutter
JPS53129964A (en) * 1977-04-20 1978-11-13 Hitachi Ltd Method and device for inserting and taking out of heat treatment jig

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5295968A (en) * 1976-02-09 1977-08-12 Hitachi Ltd Diffusion furnace with automatic shutter
JPS53129964A (en) * 1977-04-20 1978-11-13 Hitachi Ltd Method and device for inserting and taking out of heat treatment jig

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